See the Latest ARM Developments at ARM TechCon ARM ecosystem partners and licensees show off new cores, tools and microcontrollers at ARM TechCon.The annual ARM TechCon taking place October 25-27 at the Santa Cl... read more

Kilopass Unveiled Vertical Layered Thyristor (VLT) Technology for DRAMs VLT Technology Eliminates Refresh Entirely While Delivering Lower Power, Cost and Manufacturing in Logic Compatible CMOS Processes. read more

When Risk to Life Rides on a Single Component Versatile tools are givng components intended for medical devices and systems a thorough check-up to make sure their health doesn't hurt ours.When medical equipmen... read more

ARM Cortex-R52 meets challenge of autonomous systems The new ARM® Cortex®-R52 can meet raised functional safety standards across multiple markets, from automotive to industrial and including healthcare. ARM Pr... read more


Try IP before you buy: Real-time PPA analysis from eSilicon Get immediate answers to your power, performance or area (PPA) questions on eSilicon® memory compilers and I/Os using the IP MarketPlace™ environment (no cost or obligation). Demo video is now available. Recorded January 21, 2015.

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Gabe's EDA

Kilopass Unveiled Vertical Layered Thyristor (VLT) Technology for DRAMs

Gabe Moretti, Senior Editor Kilopass Technology, Inc., is a leader in embedded non-volatile memory (NVM) intellectual...

IC Design

Context-Aware Latch-up Checking

By Matthew Hogan, Product Marketing Manager, Calibre Design Solutions, Mentor Graphics Latch-up in CMOS circuits is a...

JB's Circuit

IEEE Governance in Division

Will a proposed amendment modernize the governance of one of the oldest technical societies or transfer power to a small...


Transitioning the Internet of Things to the Internet of Everything

By Dave Bursky, Semiconductor Technology Editor, Chip Design Voice biometrics to ubiquitous connectivity, this year's...

The Internet of Things

A VLIW Processor Bids to Dominate the Augmented Reality/Virtual Reality Market

By: Jonah McLeod If history is any guide to the future, each major next generation consumer device—PC, Smart Phone, and...

The Canonical Hamiltonian

Part II: The Ecstasy and the Agony of UVM Abstraction and Encapsulation Featuring the AMIQ APB VIP

Part II of our tour through UVM reusability through TLM ports and the factory in the AMIQ APB VIP. by Hamilton Carter...


Featured Solutions

Industry Leading Tools Linking Simulation and ATPG to Test

Source III provides the industry’s most comprehensive and cost-effective vector translation product (VTRAN®) which links simulation/ATPG vector data to ATE, a powerful ... more

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Datasheet Directory

    EDA Tools

    Verification Functional

  • by AMIQ EDA

    Design and Verification Tools (DVT) is an integrated development environment (IDE) for the e language, SystemVerilog, Verilog, and VHDL. It helps design and verification engineers...

  • by AMIQ EDA

    Thorough audit of your test benches Verissimo SystemVerilog Testbench Linter is a static code analysis tool that allows engineers to perform a thorough audit of their testbenches....

  • Methods / EDA Tools

  • by ClioSoft Inc.

    ClioSoft ClioSoft’s SOS Design Collaboration Platform is built to handle the complex requirements of system-on-chip design flows. The SOS platform provides a sophisticated multi-site...

  • Design-for-Test (DFT)

  • by Source III, Inc.

    Source III provides the industry’s most comprehensive and cost-effective vector translation product (VTRAN®) which links simulation/ATPG vector data to ATE, a powerful vector...

  • by Source III, Inc.

    With nearly 25 years of field-proven success, VTRAN™ offers the most cost-effective, full-feature solution to creating EDA and ATE test programs from simulation and ATPG vectors....

  • Verification

  • by Agnisys

    IDesignSpec™is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically...

  • by Agnisys

    IDesignSpec™ is an award winning Electronic Design Automation tool that allows an IP, SoC, or System Designer to create the register map specification once and automatically...

  • by Excellicon

    Organizations: EDAC, GSA, Si2 Constraints-Manager (ConMan), Constraints-Certifier (ConCert), Exceptions Toolbox and Clock Domain Crossing Review (ConDor) End to End timing...

  • by Real Intent

    Meridian CDC is the fastest, highest capacity and most precise clock domain crossing (CDC) solution in the market. It performs comprehensive structural and functional analysis...

  • by Sutherland HDL, Inc

    Founded in 1992, Sutherland HDL has trained thousands of engineers throughout the world on Verilog, SystemVerilog, SVA and UVM. WORKSHOP HIGHLIGHTS Verilog and SystemVerilog...

  • Semiconductor Technologies

    IP - Core

  • by Calypto Design Systems

    Accelerate Time to Rtl, Reduce Verification Effort
    The Catapult® high-level synthesis tool empowers designers to use industry standard ANSI C++ and SystemC to describe functional intent, and move up to a more productive abstraction level.

  • by Calypto Design Systems

    With the explosion of consumer electronics, designing for low-power has become an important design constraint and a key differentiating factor. The RTL design phase provides the ideal opportunity to dramatically reduce power, since several micro-architectural transformations can be done at this stage, both via automated tools as well as manually by the RTL designers.

  • by Calypto Design Systems

    The emergence of consumer electronics is causing a fundamental shift in Register Transfer Level (RTL) design methodologies. The race for time to market has resulted in the adoption and growth of higher level design creation methodologies. In particular, High Level Synthesis (HLS) directly from software models to hardware has become very popular.

  • by Mixel, Inc.

    Organizations: GSA, MIPI Alliance Mixel’s MIPI C-PHY/D-PHY Combo is a high-frequency low-power, low-cost, source-synchronous, physical layer. The PHY can be configured as...

  • by Mixel, Inc.

    Organizations: GSA, MIPI Alliance D-PHY RX+ is a CSI and DSI D-PHY Receiver optimized for small area and low power, while achieving full-speed production testing, in-system...

  • by Mixel, Inc.

    Organizations: GSA, MIPI Alliance The MXL-M-PHY-MIPI is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI® Alliance Specification for M-PHY®....

  • by SmartDV Technologies India Private Limited

    Organizations: EDAC, GSA, EIC, OCP-IP, Si2, SPIRIT SmartDV offers wide range of Verification IP’s, Memory models and Design IP’s. Verification models include complete...

  • by True Circuits Inc.

    Organizations: GSA The TCI DDR 4/3 PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individually,...

  • by True Circuits Inc.

    Organizations: GSA True Circuits’ complete family of standardized, silicon-proven, low-jitter PLL and DLL hard macros spans nearly all performance points and features typically...

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