It has been awhile since my last blog, as I have been “touring” across numerous countries in Asia, Europe, and the U.S. This annual “tour” of countries, however, is an essential part of building up relationships, as well as listening to the industry at large. In this blog, I’ll share a few common themes that emerged from this extensive travel period.
One of my favorite quotes from author Steven Covey is “Seek first to understand, then to be understood”. It should apply universally, but especially in marketing (where young marketeers mistake their function as merely being to “push” products). Seeking to understand the range of needs and priorities across an industry takes many forms, but nothing replaces quality face to face time with both executive management as well as the technologists. For effective collaboration, it is critical to listen to the needs as they evolve, internalize the messages, then optimize the engineering solution so that the result will get adopted and be effective. Because Si2 has a wide range of project areas, differing teams may care about different areas for their company.
Some themes are common every year, but others are more specific to our times. For example, we have continually seen OpenAccess adoption build and extend in scope, little by little. However, this year we are seeing much more direct engagement by foundries of all types, and usage scenarios well beyond traditional custom CMOS design (more digital, more PCB / package, 3D, and even photonics waveguides!). There is tremendous recent interest in using the new OA scripting language interfaces, which extends the use model for OA from just C++ developers to more project-level engineers.
In low power, the theme of interoperability has been a constant pain point over the past five years. What we heard new is not simply about mapping across two standard formats, but much more depth relating to issues in how the power intent information must be organized and managed differently across multi-vendor flows. Si2 and the Low Power Coalition are preparing an answer to lead a broad converged solution to this growing problem, so stay tuned. The other new theme is rapidly growing level of interest in defining standards for power modeling (which LPC members have been actively working on already).
There has been much talk around 3D stacked die in recent years, and this past year more focus on design standards for 2.5D and 3D silicon. Yet I am now hearing a strong – almost urgent – theme around getting started on certain standards to support production 3D chip delivery by 2013-2014. That means (multi-vendor) design flows must be ready the prior year, and that those standards must be ready a year before that (yes, that means by early 2012, which will be quite a trick).
There were many other interesting details and reinforcements, but these are several new themes that repeatedly came up during these trips. If you have other perspectives to share on these or additional themes, I’d be interested to hear about them.
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