Blogs

Pallab's Place

bloggerISSCC 2010 – Low power designs back on track By Anand Iyer

Importance of low power has never been more pronounced as with this year’s ISSCC. Low power designs were highlighted in...

JB's Circuit

bloggerFreeman Dyson - Biotech vs Nanotech Continues

Thanks to all of the folks who responded to my original critique concerning Dr. Feeman Dyson’s December’09 lecture in...

EDA Thoughts

bloggerBye, Bye Gemini

I've blogged about Gemini before: October 2008 December 2008 December 2008 December 2009 In December 2009 I...

Tuning into Jim

bloggerGoing, Going, Almost Gone

There has been a trend over the past several years in the electronics community. It has been driven by the dismal economy...

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Buyers Guide

 CHIP DESIGN BUYERS GUIDE 2008


Welcome to the 2008 Chip Design Buyers' Guide!

A comprehensive directory of vendors providing IP, EDA tools, hardware, software, services and more!


Browse by Category:

CAD-CAM
  — Design-for-Manufacturing (DFM)
  — Design-for-Test (DFT)
  — Design-for-Yield (DFY)
  — Extraction - Parasitics
  — Floorplaning
  — Layout
  — RET
DESIGN TOOLS
  — Algorithm-level
  — Analog Mixed Signal (AMS)
  — Co-Design
  — Data Management
  — Electronic-System Level (ESL)
  — Hardware Design Language (HDL)
  — Modeling
  — Power Analysis
  — Power Design
  — Prototyping
  — Register Transfer Level (RTL)
  — RF-Wireless
  — Schematic
  — Simulation
  — Synthesis
  — Virtual Prototyping
INTELLECTUAL PROPERTY
  — Cores
  — Hard IP
  — IDMs
  — Interface IP
  — IP Integration
  — Libraries
  — Memory IP
  — Silicon IP
  — Soft IP
  — Software IP
  — Verification IP
INTEROPERABILITY TOOLS
  — Data Interoperability
  — Distributed Development
  — Standards
PCB
  — Design
  — Layout
  — Modeling
  — Simulation
  — Test
  — Verification
PROGRAMABLE HARDWARE
  — FPGA - ASIC Prototyping
  — FPGA - Design tools
  — FPGA - Verification tools
  — FPGA Boards
  — Programmable Fabrics
  — Structured ASICs
SEMICONDUCTOR
  — ASIC-ASSP
  — Fabless
  — Foundry
  — FPGA
  — IDMs
  — Memory
  — Power Verification
  — RFIC
  — SOC
  — Structured ASIC
  — Structured ASICs
SOFTWARE
  — Application
  — Drivers
  — Protocol
TESTERS - HARDWARE
  — Automated Test Equipment (ATE)
  — Emulators
THIRD PARTY CONSULTANTS
VERIFICATION-CHIP
  — Acceleration
  — Co-Verification
  — Debugging
  — Emulation
  — Formal Techniques
  — Hardware Verification Language (HVL)
  — Power Verification
  — Prototyping
  — Simulation
  — Testbench
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