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Archive for June, 2014

Wearable Context

Monday, June 23rd, 2014

Sorry for the late notice on this, but I just noticed a two day old press release from Cadence this morning, and though I’d pass it along.  If you have a day to kill in San Francisco’s Embarcadero neighborhood, you might want to check out the Beyond Fusion conference today.  It features a number of speakers from the following logo splash

that will all be discussing how the semi industry can best prepare for the flood of wearable devices that are an integral part of the IoT, and how these devices can be made context aware for a more fulfilling user experience.  Among the topics to be discussed are:

What is truly useful to enhance the user’s experience

How to extend the user’s senses beyond the natural ones

How smartphones and wearable devices can know, measure and help the user.

How do we keep power down in the microwatt range for what are inherently, busy, and inherently sensor heavy applications?



DAC 51 Morning Meanderings 06_04

Wednesday, June 4th, 2014

The DAC floor only looked a little bit like ‘Shaun of the Dead’ this morning.  Folks were stumbling in after the traditional late Tuesday night parties.  By sheer random luck, I scheduled my first meeting this morning at 10:00, and got a much needed snooze.  I’m faring much better than the gentleman we encountered last night, who after staggering up, informed us that he’d walked down from Edmonton, (yes, Canada) , and inquired as to the location of Folsom St. where he’d been assured that the houses of ill-repute were beyond compare.  I hope you’re still alive little guy!  OK, that’s enough DAC color commentary for today.  Hang in everybody, we’re almost there.  It’s not over yet though, for example :

Don’t Forget Training Thursday!!!

If you have an all-inclusive DAC registration, don’t go home yet!  Training Thursday is well… tomorrow.  There’s a full list of training classes available.   There are tracks on SystemVerilog, ARM Engineering and Embedded Systems among others.  If you don’t have an all-inclusive registration, you can still get in on the action.  Here’s how much it will cost.

Managing Metrics

Wow!  I wrote about it, but they’ve actually done it!  If you’re interested in managing, browsing, and taking action using the metrics from your backend design tools, go visit Dassault Systemes.  Expect to see more on this from me soon, but for now, head over and ask to see the PinPoint tool.  Among other features, the tool overlays output from timing, I-R drop, and layout tools onto a gmaps style diagram of the chip.  Users can view historical reports of tool outputs and track progress towards physical design convergence graphically and, at least as importantly, quantitatively.  The tool facilitates a coordinated work flow between disciplines, teams, disparate locations.  It also gives managers an objective means of tracking progress and data with which they can constructively influence the flow.

Space Codesign
Space Codesign’s tools enable system architects to evaluate software vs. hardware, power vs. performance, and other high level chip design scenarios with a graphical drag and drop interface.  The company aims to ease the adoption of high level ESL techniques by insulating the user from the scarier aspects of SystemC TLM development.

 Synopsys, 62626, and Automotive Engineering

 I stopped by the Synopsys booth for a discussion of the verification challenges faced by the automotive industry.  Here are a few highlights of the conversation.

  • The automotive design problem can be divided into three areas: car control, infotainment, and autonomous driving.
  • While Ethernet doesn’t funnel any of the vehicle’s mission critical control data yet, more intra-car communications are winding up there prompting a change in the industry terminology from ‘entertainment bus’ to ‘infotainment bus’.
  • Fully automated driving systems are expected in the 2025 to 2030 time range.  Expectations are that most of the remaining hurdles will be regulatory rather than technical.
  • Expect vehicle to vehicle and vehicle to infrastructure communications in the future.  These will participate in the autonomous driving systems.
  • One of the keys to success in the automotive segment is going to be starting hardware and software co-verification more quickly.  In this case, the hardware includes an entire car, as a peripheral.  High level system simulation that can include mechanical and electrical models is crucial.


Of Interest from the IoT Panel:

Gary Smith:  IoT isn’t a market; it’s a Wall Street buzz word.

Bernard Murphy:  The number of edges in the IoT will be about the number of cells that are in a new born baby.  There are interesting analogies to be drawn between biological security and IoT security.  You need local defenses such as signaling, or perhaps self-destruct capabilities to protect the rest of the network.

Randy Smith:  Time to market is much more critical now.  There are companies in the mobile phones space putting in sensors that don’t have a use yet, but that are expected to in future phones.

DAC Meanderings, 51st DAC 06_03

Tuesday, June 3rd, 2014

The day started early with the Accelera breakfast.  The food was excellent.  There were “Fluffy scrambled eggs”, bacon, sausage and a variety of pastries. For the first half hour or so folks straggled in, slowly orienting themselves after the first night of DAC parties. The proceedings kicked off with the handling of a few business issues.  Shishpal Rawat, the current Accelera chairman outlined the achievement of the prior year and the goals and schedule of the ensuing one. The last order of business was the presentation of the Accelera Leadership Award for 2014 to Yatin Trivedi, (pictured).

A few moments later, Doulos’ John Aynsley, ever-spry, bounded onto the stage to introduce the members of his UVM roundtable.

John played devil’s advocate to keep the panel lively. He first asked what the members’ general feelings on System Verilog were. When all the panelists agreed that they were generally happy, John then prodded each of them to find out how happy they were, why, and what challenges they were still having. The general consensus seemed to be as follows:

  • Asking designers to adopt object oriented class-based solution was a hard sale.
  • Finally having a uniform standard offered by all the vendors was very, very nice.
  • There were hiccups and burps along the way as internal libraries needed to be converted to the new standard and IP vendors tended not to have adopted the standard yet.

From the Accelera breakfast a brief walk brought me to the first time exhibitors’ interviews.

Silicon Cloud
Marc Edwards, presenting for Silicon Cloud, described his vision of moving the engineering flow into the cloud.  Allowing startups and others to avert the expense of large hardware box purchases.  Silicon Cloud offers a solution that moves all design tools, licenses, and IP into a server space they maintain and monitor.  The places 1000s of virtual machines at the disposal of design engineers who access the cloud via Chrome books that have been walled from the rest of the internet.  All transactions that touch the design, IP, or tools are recorded.  In addition to providing valuable information on the process flow and the usage of tools and IP, Silicon Cloud also watches for nefarious and/or non-conformal behavior with regards to the management of IP.

Larry Lapides presented Imperas’ services and product portfolio.  The company is focusing on software verification in the embedded realm.  Their portfolio of over 140 open access processor and peripheral models allows their customers to bring up their software ahead of design completion.  The models run at millions of cycles per seconds allowing very comprehensive software scenarios.  Automotive and medical embedded applications, where software failure is not an option, are adopting Imperas’ testing and system reliability tools and methodology.

Harnhua Ng presented Plunify’s FPGA-build optimizing solution.  Their tool watches FPGA builds. which can take days to not converge, and provides early warning that non-convergence is imminent.  The tool also points out the likely causes of the non-convergence within the design so that a successful build can be achieved next time.  In addition to its dynamic build-watching features, the tool also has a static facility that scans the design-to-be-built and warns of known issues before the build begins.

Jason Png, OPTIC2connect’s founder and CEO, gave a brief presentation of his company’s optical interconnect prototyping services.  He said they don’t intend to replace design engineers, just make their jobs much simpler.   OPTIC2connect has helped their customers move their prototyping cycles for optically enabled bus infrastructures from six months to three weeks.

Synopsys is back in the Formal Verification Market
From a round of interviews with the new guard of EDA, I proceeded to an interview with one of the older names in EDA, Synopsys.  Synopsys is announcing their new entry into the formal/static verification market at this year’s DAC.  The all new tool introduces capabilities for formal verification, clock domain crossing, and low power static checking with other features on the way soon.  The tool can load in chip level, fully-flattened RTL designs to facilitate proper low power and interconnect checking.  It also sports simplified and compressed error output.  Gone are the days of day long design checks followed by searching through gigabytes of data for the error that matters.  The tool bundles errors up to their root cause which is reported along with the count of other errors that are attributed to the root.  For those that sill want to get into the gory details for themselves, an API is provided for teasing every last bit of available data out of a formal/static verification run.

Jasper’s food truck party
Jasper brought three busloads of engineers and semiconductor industry aficionados to Treasure Island earlier today to partake of the delicious wares of five different food trucks.

Entertainment was provided by Rat-Pack styled musicians, a magician, a juggler, and a lawyer turned professional bubble maker.

A great time was had by all, and CEO Jasper CEO Kathryn Kranen, thanked the Jasper team for their excellent work.


DAC and the Armenian Microelectronics Olympiad

Tuesday, June 3rd, 2014

When I saw the announcement late last week for the first stage of the Microelectronics Olympiad sponsored by Synopsys, my interest was piqued.  In my alter-ego, I’m a PhD student. A little digging revealed that the winner of the student competition being held at DAC this week would be sent all-expenses paid to Armenia for the final round.  Humorously, I wondered if perhaps the winner of the final round in Armenia would be conscripted into the Armenian engineering corps.  When I spoke with Rich Goldman, VP of Corporate Marketing for Synopsys this afternoon after the competition began, I found out almost exactly the opposite is true.

51st DAC: Students sit down for the first stage exam of the Olympiad

Rich started out by telling me a little bit about Armenia.  The country, nestled between Turkey, Georgia and Azerbaijan is one of the oldest in the world tracking its roots back 5000 years.  Mount Ararat, the fourth tallest mountain in the world, was at one time on Armenian territory. It’s the storied landing place of Noah after the flood and is clearly visible from Armenia’s largest city Yerevan.  Speaking of biblical figures, Armenia also holds the title for being the oldest Christian nation on the planet having declared the national religion to be Christianity in 301 A.D.  This small country of four million or so people has also laid claim to the world chess champion for the last three years in a row.

It was in 1991, when the Soviet Union broke up, that trouble began for Armenia. Under the Soviet system, everything had been compartmentalized. Cars came from one state, food from another, and all products were distributed across the Union as the leaders saw fit. Armenia was in charge of producing the Union’s cognac and semiconductors. This is quite a nice little combination of industries as long as your basic needs are supplied from somewhere else. When the U.S.S.R. broke up, however, Moscow not only cut the umbilical cord to Armenia, but also delivered a several billion dollar bill for support provided for the preceding 70 years of Soviet rule. To add insult to injury the United States demanded that Armenia shut down their Chernobyl style nuclear power reactor citing safety concerns.

The ensuing four years were termed by all, ‘the dark years’. The phrasing was both literal and figurative, with no power stations, there was little light. The major cities were denuded of all their trees as residents harvested them for cooking and heating fuel.

Starting in 1995, the country regained its footing and began the slow process of rebuilding. The semiconductor engineering industry was one source for the impetus of reconstruction. ARSET, the Armenian Software Engineering Team, was purchased by Monterey who was in turn acquired by Synopsys in 2004. Synopsys also purchased the Armenian company Heuristic Physics Laboratory.

Little money had been invested in the Armenian university system in the ensuing 13 years since the ‘dark years’ began. With an Armenian tech presence and a shortage of Armenian engineers, Synopsys began looking for a supply fix. Synopsys’ solution was to start the microelectronics degree program at the State Engineering University of Armenia. Housed inside an old silicon fab that was renovated into classrooms, the program includes bachelors, master, and PhD degrees. Synopsys employs about 60% of the graduates, and their Armenian offices consist of a full 40% of engineers who are products of the new degree programs.

In true plan, execute, measure, and reiterate style, the microelectronics program started the Olympiad as a way to judge their students against those in the rest of the world. The competition started out small, including only institutions from the immediately surrounding areas, but has now grown to include contestants from 28 countries including the United States, Jordan, the United Arab Emirates, Georgia, China, and Germany. Each of the countries has a first round competition among their own students. The winner of the first round receives an all-expenses paid trip to compete in Armenia at the International Olympiad. After the competition, all the students attend an awards ceremony in the Armenian Presidential Palace where they get to meet the Armenian president. There are awards for the best engineer from each country, and various other special awards.

When Rich mentioned that there’s an award for the best female engineer, I asked what percentage of engineers in Armenia are women. His reply, “About half”. As it turns out, almost all male students are required to serve in the Armenian military for two years which results in a somewhat heavier loading of female students into the engineering profession.

And that brings us back to the conscription question. Want to avoid winding up in the Armenian military? Be the best engineer you can be! If you graduate from the bachelors level of the microelectronics program and are accepted into the more selective Master’s program, you’re allowed to put off your conscription until you complete the degree. If you manage to get into the even more selective PhD program and successfully graduate with your doctorate, you get a free pass, no military service required.


DAC Notes, 2014_06_02

Tuesday, June 3rd, 2014

Puuurrrple, so much purple! The stage at the packed Synopsys, Samsung, ARM briefing this morning was backed by ceiling to floor Synopsys-purple curtains. The Samsung vision video played on the two large screens on either side of the stage. To steal a phrase from “Love Actually”, Samsung’s vision is that “touch-screens are… everywhere” . Among the envisioned apps were a touch screen floor for your kids’ room, complete with planetarium app; a touchscreen window for your Town-Car so you can adjust the thermostat as your driver taxis you to your destination, (because using a touch screen while actually driving would be dangerous); and finally a touchscreen gadget for the kitchen that when laid flat weighs the food and registers the number of calories in the amount you’ve sliced off on its cutting board tough screen, displays the recipe you’re using when upright, and finally, get ready for it… checks the ‘safety’ of your food displaying an all clear icon complete with a radiation safe emblem. Apparently the future isn’t completely utopian!

As the vision videos wound down, Phil Dworsky, director of strategic alliances for Synopsys, stood and introduced the three featured speakers, Kelvin Low, of Samsung, Glenn Dukes of Synopsys, and Rob Aitken from ARM. The key point of the presentations was that the Samsung/Synopsys/ARM collaboration on 14 nm 3D finfet technology is ready to go. The technology has been rolled out on 30 test chips and 5 customer chips that are going into production.
Most of the emphasis was on the 14 nm process nodes, but the speakers were also quick to point out that the 28 nm node wasn’t going away anytime soon With its single patterning, and reduced power consumption, it’s seen as a perfect fit for mobile devices that don’t need the cutting edge of performance yet.
News and trivia
It was nice to visit with Sanjay Gupta, previously of IBM Austin, who is now at Qualcomm, San Diego.

While smart phones have been outshipping PCs for a while, tablets are now predicted to outship PCs starting in 2015.

Bryan Bailey of verification fame was one of the SNPS/Samsung/ARM raffle winners. He’s now a part of the IoT!

IoT predictions are still generally in the Carl Sagan range, there will be ‘billions and billions’.

Samsung has a fab, Fab8, in Saratoga, NY.

Last year’s buzzword was ‘metric driven’, this year’s is ‘ecosystem’ so far. The vision being plugged is collaborations of companies and/or tools that work as a ‘seamless, [goes without saying], ecosystem’.
Catching up with Amiq
I visited the Amiq booth and spoke with Cristian Amitroaie. Since the company is planted squarely in the IDE business, Amiq gets the fun job of working directly with silicon design and verification engineers. This year, their products include an Eclipse based work environment, with support for e, and SystemVerilog built in, their verification-code-centric linting tool Verissimo, and their new documentation generation system Specador.

IC Manage
I’m always intrigued by a good ‘wrap a measurable, or at least documentable flow around your design process’ story, so I dropped by the IC Manage booth this morning.
IC Manage encapsulates many of the vagaries of the IC development flow into a configuration management tool. The backbone of the tool can be customized to the customer’s specific flow via scripts, and it provides a real-time updated HTML based view of what engineers are up to as project development unfolds.