Nearly every modern FPGA architecture includes special-purpose resources in addition to the logic fabric. While these resources are useful for many applications, their presence also increases the difficulty of the designer's task. Properly managing the use of these special-purpose resources determines the quality of the resulting design.

While today's synthesis tools can automatically map portions of the design to these special-purpose resources, the designer must often guide the tool to get the best results. Providing this guidance to the synthesis engine can be both difficult and tedious. What is needed is an easy-to-use, comprehensive resource management system, integrated with the synthesis tool, allowing the designer to provide guidance in an intuitive manner.

What are FPGA resources?

When FPGA technology emerged, the concept was simple — build an array of general- purpose logic tiles which can be programmed to produce any possible logic configuration. This approach worked for simple designs but was limited in its ability to handle more complicated designs. For example, many designs require large amounts of memory, and using these general-purpose tiles to create memory arrays is very inefficient. The designer was forced to use off-chip memories when using FPGAs in a design with large storage requirements. Enter the special resource stripes that appear in most modern FPGA architectures. Putting a column of purpose-built RAMs among the logic columns made these programmable devices practical for a much larger set of designs, allowing memory needs to be met on-chip. In addition, many architecture include purpose-built multipliers. Besides being area efficient, an embedded multiplier resource can operate much faster than a corresponding circuit built with fabric logic, and opened the door for more complex structures such as dedicated DSP blocks. Future devices will surely contain even more complex functions implemented as dedicated resources.

Why are resources important?

To a great extent, the quality of the synthesis results is determined by how efficiently the tool takes advantage of these special resources. The proper use of FPGA resources often allows a much larger design to be mapped into a smaller device. Special resources also enable loftier timing goals than would be possible with fabric logic alone. As these resources are limited, often a design can require more of these resources than are available in the target device. This shortage results in the synthesis tool having to make tough choices when deciding how to best to map a design to the available resources within the target device.

Why must resources be managed?

Synthesis tools do a great job of managing the trade-offs inherent in resource allocation. The tool can look for a mapping to achieve the best area savings; for example, mapping larger RAM constructs within a design to the available block RAMs, and smaller RAM structures into fabric. Timing can also be a consideration. In some cases, logic on the critical path of a design is best implemented within fabric logic, while in other cases, only the use of special resources will allow the design to meet performance goals.

Integrated Resource Management

While synthesis tools can use heuristics to determine the best implementation for most designs, they will never have all of the knowledge the design engineer possesses. In many cases, it is possible for the designer to obtain superior results by guiding the synthesis tool with manual resource assignments in important areas of the design. While this allocation has been possible in most synthesis tools through the use of attributes, as the complexities of these resources have increased, this approach has become increasingly tedious.

Clearly a new way of managing resources is needed. This resource management tool must be able to quickly find the blocks where resource assignment makes sense, help the designer determine valid choices, considering both the design requirements (area, performance) as well as what is available in the target technology, avoid over-allocation of hardware resource and provide an environment where experimentation and design iteration is easy. Ideally, the designer should be able to make decisions considering the design requirements, and be insolated from details of the specific FPGA architecture.

Applications of a Resource Management Tool

This new resource manager should address the complexities of resource assignment in modern FPGAs. The typical usage of this tool would come after the initial synthesis (with automatic resource allocation) indicates that there are problems meeting design specifications. Issues that can be addressed with a resource manager include:

* The design does not fit into the target device, but free dedicated resources can be used to reduce fabric logic requirements.

* The design requires more special resources than are available. Careful use of these scarce resources can improve results.

* The design is not meeting timing requirements. Operators on the critical paths can be re-assigned to different implementations to improve performance.

An FPGA designer needs to be able to easily identify and address these issues using an intuitive GUI approach, with strong integration into the analysis features of the synthesis tool.

Conclusion

Resource management and allocation control has become a common issue with modern FPGA designs. At the same time, the options available to map logic to special resources have become more flexible, and therefore, more difficult for the end user to handle. New tools are needed to ease this operation — new tools combining integration with the analysis tools in synthesis, and with an understanding of the technology-specific options available to the designer. Comments about this article? Share your thoughts by writing the editor at jkobylecky@extensionmedia.com and our editorial director: jblyler@extensionmedia.com.