"Smaller, faster, and cheaper” has been the mantra of the semiconductor industry for over 40 years. But the latest 45- and 32-nm technology nodes have many in the semiconductor industry crying “uncle.” Efforts to deliver technology on the timeline demanded by Moore’s Law have collided head-on with the economic realities of semiconductor manufacturing. It’s just too costly. Students of “techonomics” (the interdependency of technology and economics) have one heck of a case study on their hands.
By 2011, semiconductor content in electronic products is predicted to reach its highest peak ever at 24.5% (IC Insights). Fueling this growth is the complexity associated with the burgeoning consumerelectronics market including 3G, 4G, Wi-Fi, Auto, Flash, and Hi- Def. To meet consumers’ insatiable demands, capital spending is expected to grow from over $50 billion in 2006 to over $80 billion in 2011 (IC Insights). At the same time, the semiconductorindustry business environment is changing dramatically. Many integrated-device manufacturers have adopted a “fab lite” model. Or they’re getting out of leading-edge development altogether and relying on foundries instead.

Electronic design automation (EDA) can only grow stronger as a result. Although it was traditionally all about automation and simulation, EDA is now being called upon to enable the integration, sharing, and analysis of complex information from design to manufacturing. In fact, changes within the semiconductor manufacturing sector are providing the biggest opportunity for the EDA industry since its inception in the early 1980s.
Initially, EDA companies provided an automated means to lay out and connect the components of an integrated circuit. It sounds simple today, but it was revolutionary for that time. The industry subsequently grew to handle timing closure, power, verification, and signal integrity. Still, EDA remained somewhat disconnected from the ultimate manufacturing process.

Over the past several years, this disconnect became untenable. With the growing complexity of chips, narrowing market windows, and increasing expectations to meet required return on investment (ROI) with the first lot off the line, the industry demanded another look at how far down the flow design should reach. Design for manufacturability or “DFM” was coined to describe a wide range of processes—most importantly, the ability to place manufacturingrelevant information into design tools to improve accuracy, decrease TAT, and improve yield.

Doing DFM correctly requires expertise in both design and manufacturing. Tools and flows must ensure that the right information is provided in the right place at the right time. A portal or common platform must be provided to carry the information from manufacturing up into design. For example, a DRC-clean design could result in lithographic hot spots for a given process that—worst case—will reduce yield. If such hot spots were discovered earlier, you could make corrections to the design automatically and save a great deal of time. While much of DFM’s focus is currently on lithography simulation, consideration must be given to chemical mechanical polishing (CMP), stress, and etch. Eventually, cost, complexity, and TAT issues will dictate that all key unit processes be simulated. Ultimately, the value of DFM to the customer lies in providing a predictive environment. Such an environment would allow designers to accommodate the constraints and variability of a manufacturing process in order to optimize performance, power, yield, and cost. The result would be greater assurance that the costly semiconductor manufacturing facilities would remain as efficient and productive as possible.
Where does this leave DFM’s future? By building on what we’re developing today, a virtual manufacturing environment can be created. Such an environment would allow designers to run potential designs through a virtual process, automatically optimizing the design before it is ever committed to the expensive silicon manufacturing process. The elimination of even one silicon run or the gain of just one yield percentage point can have enormous impact on the value chain. Techonomics will demand such an environment.

Building this environment isn’t a trivial task. Close relationships must be formed with equipment manufacturers. In addition, integrated flows must be created and fab data has to be correlated. Physics-based models also must be generated. What EDA companies have always done very well is tackle complex problems and provide software to automate the necessary tasks for an accurate, timely result. For over 20 years, EDA has been training to address the challenges that we’re finally facing today. We are up to the task.