Published on May 19th, 2008

Design Data Management Improves Productivity - Even for Small Design Teams

As demonstrated by the design of a very small, high-frequency analog component, even small teams working on small designs can realize significant productivity benefits by using Design Data Management (DDM).

There is little denying that design data management (DDM) is considered a seriously boring topic. It's a topic that often causes engineers' eyes to glaze over and prompts them to reach for that next cup of coffee and another donut. This is not because DDM is unnecessary. On the contrary, it is an extremely valuable asset vital to the livelihood of many companies – especially those which utilize design teams comprised of a large number of engineers or teams located in geographically dispersed locations. However, because it is such a "given," DDM is all too often taken for granted.

By providing one platform that is integrated with all the major tools in the semiconductor design flow, a DDM system can facilitate collaboration and enable efficient management of design data and processes from concept to tape-out and beyond. DDM systems address many of the challenges confronting today's design teams, including: large, globally distributed teams; complex flows and multiple tools; and extremely large and complex data sets. Because of this, they are often used only for large projects with large design teams. What many companies and engineers fail to realize is that DDM can be just as valuable and indispensable a tool for small design teams working on small projects – even when the team members are located in the same building. This is exactly what one small Tektronix design team discovered when it undertook the development of a component in a special-purpose oscilloscope. It's a lesson that is generally applicable to the design community at large, no matter what the size of the team.

The Company

Tektronix supplies test, measurement, and monitoring products, solutions, and services to a broad range of industries worldwide, including communications, computer, semiconductor, military/aerospace, consumer electronics, and education. With over 60 years of experience, the company successfully enables its customers to design, build, deploy, and manage next-generation global communications networks, computing, and advanced technologies. Headquartered in Beaverton, Oregon, Tektronix has operations in 19 countries worldwide.

The Challenge

In 2007, Tektronix set out to develop a small, very high-frequency analog component for a special-purpose instrument, the 70 GHz DSA8200 Digital Serial Analyzer Oscilloscope. The team assembled for this project included myself (the author), primarily an EDA engineer, and a single designer. I provided the project’s process design kit (PDK), while the designer was responsible for both its schematic and layout. Both of us were located in the same Tektronix building, but occupied offices on different floors.

Prior to beginning the project, the Tektronix team was presented with the option to use a DDM solution. While initially we considered dismissing this suggestion, we ultimately opted to use the DDM solution. A number of considerations factored into that decision. On one hand, when we were initially deploying PDKs and starting projects on the Cadence platform, I questioned whether using the DDM solution was worth the extra overhead and administration that would be required. And, because the designer would need to learn the solution’s nomenclature, we surmised that the solution would add an additional level of complexity into an already complex development environment.

There were other critical factors, though, that made the use of a DDM solution quite appealing. At the time, I was not dedicated to the project on a full time basis and therefore my time and resources were limited. Given these circumstances, we chose to use a DDM solution, specifically SOS via DFII from ClioSoft.

SOS via DFII DDM for Cadence Virtuoso

ClioSoft's SOS Design Data Collaboration Platform is the core design data management engine. The SOS platform allows geographically dispersed teams to work and collaborate on the same project just as easily as if the teams were located in the same room. In our case, we were geographically separated by just one floor! The SOS platform’s key capabilities include design reuse, integrated issue tracking, global collaboration, release and derivative management, security, and version control.

The SOS platform provides a ready backup of previous file revisions and tracks file renames, deletes, and moves. Tags (symbolic names attached to revisions) enable the user to recreate labeled states at any time. Snapshots of the design also record milestones and exact configurations, including file revisions and directory structure, so that they can be recreated at any time.

ClioSoft has integrated this engine with popular IC flows. SOS via DFII is their “DM Adaptor” for the Cadence Virtuoso flow that we use in this and several other projects. The DDM capabilities are available just where you need them – within the Cadence Library Manager and Editors. Designers can work with libraries, cells, and views and the related collections of files are automatically versioned as composite design objects.

Design Data Management in Action

Once the Tektronix design team decided to use the SOS platform solution, the resulting design process was fairly straightforward. Design work on the high-frequency analog component was performed using the Cadence Virtuoso Custom IC design platform, in conjunction with SOS viaDFII. We were able to invoke data management features directly from the Virtuoso environment. This allowed me to remotely monitor the design from my desk and get continuous visibility into the designer’s activities.

As the design progressed, SOS was used to checkpoint, or snapshot, the design. Version control enabled the designer to turn over circuits to me as issues arose. When the designer discovered a problem, I simply accessed the design at the point at which the error occurred and then proceeded to debug it from my desk. The designer was free to continue designing by simply working around the problem. Naturally, trying out various potential PDKs, across the projects, resulted in a fair amount of debugging. So this turned out to be an especially helpful function.

This particular IC is fabricated by a foundry that has a unique flow. Because a good portion of the data is merged at the foundry, only limited physical verification could be done on-site. Thus, once the design was complete, the foundry performed the final verification of the die following tape-out. Tektronix simply did not have enough of the data locally to perform the required full verification. Here again, the snapshot capability proved extremely valuable as some iteration was required to get the design to converge through the foundry.

With SOS, we were able to obtain a snapshot of each of the tape-outs and then continue working with the part. We were also able to take pieces of the design to use in a second variant of the part. As we would get something back from the foundry, we could then go back to the SOS snapshot and see exactly what the design looked like, matching any given silicon. Utilizing the SOS revision search order mechanism and tags, the engineer could easily jump back to a previous version of the design. The method worked extremely well. This part, as well as an additional variant of this component, was successfully deployed in to production.

As a result of this project, the Tektronix design team discovered that the ClioSoft SOS platform is able to play an extremely valuable role even in very small designs. If we had not used the solution on this small design, we would have been forced to make a lot of copies. This would have been the only way to affect the same range of functionality available with the SOS platform. Every time we wanted a snapshot of the design, the designer would have had to stop what he was doing, copy the database and store it for future use – a process that would have taken up valuable time and resources. And even then, I could never have been certain that, when a problem was discovered, I would be working on the actual copy of the design where the problem occurred.

With SOS, this was not a problem. Revision numbers and tags ensure that all members of the team always know exactly where the design is at any given point in time. This level of granularity is extremely helpful when debugging a design.

The Tektronix design team also discovered that one of their key concerns regarding DDM overhead and administration – the time it would take for the designer to learn the tool – was unfounded. It only took the designer about 15 minutes to learn the SOS nomenclature. The benefits associated with using the solution made any extra effort on our part worthwhile.

Benefits Realized

The key benefits that this design data management solution brought to the Tektronix design team included the following:

  • Enabled the EDA engineer to remotely monitor and debug the design from his desk while the designer continued to work on the design.
  • Allowed the team members to work closely together without having to create and maintain copies of the design.
  • Allowed us to explore different design variations. When we first began the project, it was not clear whether the project would entail development of a single chip on the process or a sequence of chips. Ultimately, the team ended up developing a sequence of chips. This process was made substantially easier by the fact that the SOS platform allowed the team to explore different design variations.
  • Most importantly, we were able to meet our schedules and deliver a quality product with a high level of confidence.


The use of a DDM solution for teams comprised of hundreds of seats has today become a commonly accepted and well understood practice. In contrast, small design teams have tended to shun DDM, associating it with significant overhead of use and administration. As demonstrated by the Tektronix design of a very small, high-frequency analog component, even small teams working on small designs can realize significant productivity benefits.

Grego Sanguinetti, Principle Engineer, Microelectronics, Central Engineering, Tektronix, Inc. was bitten by the EDA bug at UC Berkeley in the early 80s. In 1982, he joined the IC lab at Tektronix and went on to design the first integrated microwave IC design system. He worked on the all-bipolar SPARC and MIPS R6000 processors at Bipolar Integrated Technology; was the CAD manager at Lattice Semiconductor during the 90s; worked on embedded DRAM at Micron; and was the Director of Design Integration at Accelerant Networks. He rejoined Tektronix in 2003 and is the design flow project leader attached to the High Frequency Analog Design group.

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