In the course of the design and analysis of a typical 65 nanometer (nm) systems-on-chip (SoC) project, it’s not uncommon to generate more than two to three terabytes of data for even moderately-sized designs.  In addition, the design teams producing all of this data are increasingly separated by geography, language and specialization, which of course adds to the overall challenge of efficiently executing design programs.  Yet, despite – and to some degree because of – this combination of program complexities, getting accurate and timely information on program status to all stakeholders – from the designers to the C-Level executives – in a form that can be quickly analyzed and acted upon has never been more important to the fiscal success of a design project.

One of the more elusive aspects of managing a modern SoC development project is predicting the date for design closure.  In this context, managing design complexity is all about making well-informed course corrections throughout a design project that will lead to a shorter, more predictable schedule.  It’s probably no great surprise that two-thirds of design tapeouts are late, according to recent Synopsys Users Group (SNUG) data based on surveys of over 2500 designers worldwide. Even in the final phases of chip implementation, experienced design and program managers often find themselves estimating tapeout will happen “next week” for months. Senior managers can feel like they are “flying blind” as they attempt to plan and re-plan product availability to early customers. A systematic infrastructure for capturing and reporting information that shines a light on design status and trends helps project managers and executives make data-driven decisions to improve their schedules. 

The implementation of a metrics capture and reporting system should be guided by three tenets. First, acquiring the metrics should be automated, so that it imposes little to no overhead burden on the design team and to ensure accuracy of the data.  It is time consuming and error prone to reconstruct the state of a design after-the-fact.  Second, the same metrics data must be readily accessible to all stakeholders. Important information can be lost in the manual collection, interpretation, massaging and abstraction of complex design metrics. Finally, design metrics should be presented in a form that can be quickly comprehended.  Little efficiency is gained if the data cannot be quickly assembled into actionable, management-relevant reports.  A metrics system that adheres to these principles can provide the basis for a common understanding of the design status at all levels of management, giving the collective team the information they need to drive project priorities. 

During the chip’s implementation phase, there are certain metrics that help assess the progress of the design towards closure, which include:

• Physical-related: size (chip/block area), cell utilization, DRC and LVS condition, number of nets, number of pins, number of instances
• Timing-related: number of clocks, min/max total negative slack (TNS), min/max worst case negative slack (WNS), clock skew, clock latency
• Power-related: IR drop, power dissipation (total, leakage and dynamic)

Because the reports built from these design metrics can serve many purposes by a variety of stakeholders each with different needs, flexible representations of the data is required.  Appealing to multiple levels of project and corporate managers requires baseline reporting capabilities such as dashboards that provide quick summaries of the primary project metrics (e.g., frequency, area and power), and trend analyses which show design progress over time.  The ability to quickly compare actuals to target goals is also valuable.

Your Design-At-A-Glance:  Example Design Metrics Reporting Tool

An example implementation of an automated design reporting infrastructure can be found in Synopsys’ L-y-n-x Design System.  The system’s Management Cockpit provides web-based access to a centralized database of design metrics acquired during the execution of the design flow, and an intuitive tool for creating graphical reports that facilitate interpretation of the acquired metrics.

Over 50 key design metrics are automatically captured in the system, and users can specify their design targets to simplify the checking of design status.  Custom reports can be quickly configured and saved through a simple user interface, providing single-click access to all project stakeholders.

Summary

The lack of accurate and timely project information that is readily accessible and consistently interpreted can take its toll on the predictability of a project’s tapeout.  Directing a modern SoC design project to achieve the best possible schedule relies on project and executive management teams having clear insight into design status and trends.   A robust design measurement system can deliver unbiased and relevant data to all project stakeholders in a timeframe that enables them to shift resources and priorities for the best project impact.   To be most efficient and effective, the measurement and reporting infrastructure should enable:

• Real-time, on-demand, access to design-specific metrics
• Automated data capture to minimize the overhead burden on the design and management teams
• Design data to be captured at run-time to ensure accuracy
• Design management and senior executives to share a consistent view of the data:  single version of the truth
• Managers and executives who do not have access to or knowledge of design tools to easily extract relevant project metrics and rapidly generate intuitive, graphical representations of the data

The additional visibility provided by a well-implemented design metrics and reporting system can help chip developers manage design complexity and make the final stages of a chip’s implementation less of an art and more of a science.