Published on January 14th, 2011
By all accounts, 2010 was a record year in terms of year-over-year growth for the semiconductor industry. This should come as no surprise, although maybe with a sigh of relief, after a disastrous 2009. And most industry forecasters are calling for more growth in 2011, at significantly slower rates, across almost every semiconductor application and market sector.
Rain or shine, one of the true bright spots in the forecasts continues to be programmable logic. Some pundits peg FPGA/PLD growth to be as much as 40% or more in 2010, with estimates of growth in 2011 and beyond continuing to outpace the overall semi industry by a good margin. FPGAs, the high end of this segment, in particular are experiencing strong demand for a variety of reasons, and winning new ‘sockets’ where previously they were virtually ignored.
Of course, the FPGA vendors, riding the push of Moore’s Law as skillfully as anyone, deserve the lion’s share of the credit for this growth. Their latest generation devices offer unprecedented performance, SoC integration capabilities, and competitive size and lower power consumption specifications. Combined with their ability to drive down pricing through advanced manufacturing processes, FPGAs are not just riding the rising tide of semiconductor industry growth – they are capturing significant market share from traditional hard wired alternatives such as ASSPs and ASICs.
With these bigger, more capable FPGA devices, the equivalent of multi-million gate ASICs, engineers can incorporate more logic and functionality into FPGAs. They can also integrate more IP, and the most ambitious uses of FPGAs today are some of the more robust SoC designs in the industry. The business and technical cases for using FPGAs keep getting stronger.
In our customer base – the power users of FPGAs, both for production applications and ASIC prototyping - we are seeing a growing trend by system developers to adopt FPGAs as their primary platform. This is mainly a result of increased density of high-end FPGAs, and their ease of implementing algorithms in hardware for increased performance. Designers favor the flexibility of FPGAs to test and analyze implementation approaches, and when they realize the FPGAs are just as capable as an ASIC – and more often, as cost-effective – the decision to use an FPGA for a full blown production project is becoming more common. By the way, this is true even in cases where FPGA’s programmability in the field is not a huge factor one way or other, although that type of flexibility is more and more important to a larger segment of electronic product developers as well. Since the devices satisfy the requirements of more applications, the use of FPGAs enable designers to be much more nimble with the product features and update them later in the design cycle than they could if they used an ASSP or other custom device alternative.
Design tools and methodologies enabling shift
Underlying the growth of FPGA use and innovation in FPGA based systems is an ever-improving ecosystem for enabling their use and differentiation. Existing IP and tools companies are fine tuning their offerings to meet the distinct needs of FPGA designers, and there is a noticeable growth in start-up and research activity in this area as well. No longer capable of being implemented using free tools given away by the device vendors, today’s FPGAs require sophisticated tools and methodologies, often tuned to the specific nuances of FPGA design.
Major EDA companies like Synopsys and Mentor invest heavily now in design tools, with advanced simulation and synthesis capabilities key focus areas. Specialized providers like GateRocket target challenging design bottlenecks – verification, in our case – which need innovative approaches to deal with issues that threaten the time-to-market benefits FPGAs offer. And over the past year we have seen an increase in the amount of start-up activity around FPGA tools. Companies like InPa and Oasys are getting attention, further validating that there is a viable market for FPGA design tools.
I envision 2011 being another year of innovation and new products for FPGA designers. Both major FPGA vendors will deliver a doubling in complexity with their 28 nm device families and a host of new hard IP blocks integrated into the new devices. At GateRocket, we have several developments in the works that will further enhance verification methodologies for complex devices, including more application-specific approaches for areas like DSPs, embedded and more. Elsewhere in the industry, a further move toward high-level design methodologies, languages and design tools is likely as well, as are better and more efficient ways to deal with low power design in FPGAs.
It will also be a pivotal year in the adoption of FPGA-specific methodologies as more and more engineers learn that what works in ASIC design may not the best approach to FPGAs. Increasing attention will be paid to eliminating the still very painful process of verifying multi-block FPGA designs, which today routinely requires an inordinate number of loops through synthesis and place-and-route to verify accurately. Pure verification performance, a challenge no matter what the implementation platform, will see designers gravitate more to hardware-assisted methods, too.
The FPGA bandwagon will roll on in 2011, as programmable platforms continue to be more capable and implementable. The silicon vendors are doing their part, and the design implementation ecosystem is robust and getting stronger, further breaking down the few remaining resistance points to choosing and FPGA over an ASIC or ASSP.
Dave Orecchio, President and CEO, GateRocket, Inc.
Dave has 24 years of semiconductor industry experience. Prior to GateRocket, Dave held executive positions in marketing, sales and general management at LTX, Viewlogic Systems, Synopsys, Innoveda, Parametric Technologies and DAFCA.