Published in issue of Chip Design Magazine

Globalfoundries Confronts Issues and Plans Ahead

While the theme of collaboration was the same, the discussions at this year’s Globalfoundries GTC2011 event focused on supporting legacy nodes, acknowledging present challenges at 32nm and moving ahead to 28nm and 20nm with a strong ecosystem of partners.

While the theme of collaboration was the same, the discussions at this year’s Globalfoundries GTC2011 event focused on supporting legacy nodes, acknowledging present challenges at 32nm and moving ahead to 28nm and 20nm with a strong ecosystem of partners. 

As with last year’s inaugural event, topics at yesterday’s GTC2011 spanned every segment of the chip business covered by the company -– from IDM chip designers and fabless IP providers to global manufacturing foundries.

One reoccurring theme that popped-up throughout the day’s events was the yield challenges faced at 32nm with gate first High-k Metal Gate (HKMG) technology. Gregg Bartlett, Senior VP of Technology and Integration addressed this issue early on by noting that Globalfoundries was the first fab to ship HKMG in volume. In terms of performance, Bartlett sited the implementation of HKMG running at 3 GHz on an ARM Cortex (for the 28nm-HPP process). Multi-voltage and multi-channel length options provided low power capabilities. Further, all key modules have been well characterized to lessen future yield problems. Bartlett summarized by explaining that 32nm HKMG chips were shipping in volume at the Dresden facility.

Several customers’ attested to the success of the 32nm gate first HKMG implementation, such as AMD’s A-Series chip. Using free software, this chip performed impressive post processing of a real-time video stream.

The questions concerning HKMG and different gate structures seem to invite comparisons between Globalfoundries and Intel. As Bartlett pointed out on at least one occasion, this is not an apple-to-apple comparison (Yes – that pun was intended. See, “ “) Gregg reminded the audience that Intel has a single customer and controls a very dedicated design process. Globalfoundries has many customers with many different design styles. Further differentiating the two was Intel’s historical focus has been on processors, while Globalfoundries must accommodate everything from networking systems to low power SoCs.

During the afternoon’s CEO panel, Aart De Geus, Chairman of EDA giant Synopsys, used the analogy of cooks in a restaurant to highlight the variety of different “dishes” which Globalfoundries had to provide to satisfy a hungry customer base.

Moving beyond transistor FinFet structures to much larger die structures, specifically 3-D ICs, Globalfoundries reemphasized their partnership with packaging giant Amkor Technology. It appears as if the long awaited 3-D ICs might appear as early as 2012 with shipments at 28 and 20nm nodes.

In addition to device structures and manufacturing issues, semiconductor intellectual property (IP) weaved its way in and out of almost every discussion at GTC2011. This is hardly surprising, since third-party IP is a key element in the company’s business and development model. Several IP providers received awards at the start of the morning sessions (see http://www.globalfoundries.com/gtc2011/ ). Here’s a sampling of some of those award winners, gathered from Tweets during the show:

  • Globalfoundries CEO speaking at GTC2011: 32nm had challenges, but now overcome. 28nm right around the corner with 300mm capacity on 3 continents.
  • Innovative Mobile Solution award -Inside Secure for very cool micrcon and NFC consumer tech bit.ly/pCdytz #semieda #eda
  • Emerging Start-up award Lightwire for photonic interconnect on 130nm to 65nm RFCMOS bit.ly/onW2jL #globalfoundries #semieda

In addition to the ecosystem, IP was specifically addressed in Walter Ng’s “IP Enablement” presentation. Ng, the VP of the IP Ecosystem at Globalfoundries, echoed the conference theme of collaboration across aspects of the SoC design and manufacturing business, from IP providers, design services, EDA tool suppliers and the foundries. But Ng added this twist, emphasizing that successes depended on early engagements and deeper relationships. One example he cited was the company’s requirement of a specific DFM scoring in the IP development flow. This was but one example of IP-EDA (e.g. Mentor’s tools) – foundry collaborating together in design and manufacturing.

Globalfoundries made it a point to emphasis that they don’t offer IP – unlike some of the other major fabs – because offering IP would mean competing with their customers. Also, foundry IP can lock the design to a single manufacturer, which could be dangerous as was the case during the recent disaster in Japan. But I remember a major EDA company that made that same claim several years back, namely Cadence. They have since changed their position. Offering IP is a double-edged sword.

Perhaps GTC2011 can best be surmised by an observation made by Mojy Chian, Senior VP of Design Enablement at Globalfoundries. During the closing of the CEO panel, Mojy noted the many challenges faced by the semiconductor design and fabrication industries. It also seems as if the challenges to reach the next level of SoC complexity are overwhelming, that this time the industry may not succeed. But the industry has been on that brink for the last 30 years and each time if finds a way to overcome.

Perhaps collaboration is the way.

John Blyler is the Editorial Director of Extension Media, which publishes Chip Design and Embedded Intel® Solutions magazine, plus over 36 EECatalog Resource Catalogs in vertical market areas.


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