Published on December 05th, 2011
The EDA industry may be small, but we have some very powerful partners and that is creating a game-changing opportunity for the industry.
Some of the biggest companies in the world – Apple, Microsoft, and Google, for instance – have all discovered the power of system on chip, or SoC devices. They have become champions for this new cause. Apple, which continues to challenge Exxon Mobil as the world’s most valuable company, is the world’s largest consumer of silicon. And Microsoft CEO Steve Ballmer during his keynote at CES this year discussed why Microsoft was adding SoC support. These industry giants have realized that the value of their products and the associated customer experience are significantly enhanced with SoC technology.
But let’s also look at the reality: there are some major hurdles to address.
There is no denying that complexity, risk and sky-rocketing costs have posed significant roadblocks to widespread adoption of SoCs. According to IBS, at 22nm, a typical design has a less than 30 percent chance to meet all of its objectives. Re-spins add to the total cost, which exceeds $100 million for a design at 22nm. System companies look to create specialized blocks for the SoC to enhance differentiation. These blocks are usually designed by geographically disparate design teams. Add to this other IP blocks from third-party providers, and the integration challenge becomes difficult and costly.
Plus SoC vendors are being required to deliver more than just the chip. They must provide complete solutions – hardware, software. And to avoid potentially crippling delays, implementation readiness is crucial before back-end silicon implementation even starts.
In the face of such daunting challenges, it’s a wonder that SoCs find their way to any product. But the consumer market is clamoring for electronic products with more features and longer battery life, and SoCs are crucial to fill the need. Think about the case of the latest Apple smartphone, the iPhone 4S. It sold 4 million units the first weekend it was available. So the market is clearly there and the demand for a new level of product innovation can and will re-energize the semiconductor industry.
To effectively capitalize on this trend, there needs to be a new way to design SoCs - one that bridges the gap between the high-level abstraction of the system level and the low-level abstraction of the silicon implementation level. The correct solution must focus on efficiently creating SoCs at an appropriate level of abstraction. One that allows detailed definition of the architecture (hardware and software), well-informed and correct choices for IP, streamlined chip assembly and an environment that allows designers to mature the design by analyzing, verifying and optimizing it before costly back-end silicon implementation begins.
To provide these solutions, a new domain -- SoC Realization -- is quickly emerging. The term SoC Realization was originally defined by Cadence Design Systems in its 2010 White Paper, “EDA360: The Way Forward for Electronic Design.” It has since become an important trend for semiconductors and EDA.
SoC Realization represents the highest point of leverage between a design that is too abstract to make intelligent choices and a design that is too far into implementation to fix problems easily.
SoC Realization is more an ecosystem than a set of tools -- it is the umbrella of things you can do to make it easier to design SoCs. If SoCs are to continue to drive innovation, we must streamline the design process. System companies, EDA vendors, IP suppliers, foundries and semiconductor companies must work together to create more effective solutions. This will take an unprecedented level of partnership and collaboration, and we are already starting to see such cooperation in examples like TSMC’s Open Innovation Platform and Microsoft’s Windows on ARM. This reflects a major paradigm shift for the industry.
It is important for the EDA industry to recognize and support SoC Realization because it will drive growth for semiconductors and EDA. If you reduce the cost of creating an SoC, that effectively increases the number of candidates and players for SoC deployment. SoCs will be considered for use in more applications if they are more affordable and easier to design.
SoC Realization presents an opportunity for new leaders in the industry to emerge. With very powerful companies driving this innovation trend, it will not be business as usual for the EDA industry, and that, I believe, can be a very exciting time for all of us.
Are you up-to-date on important SoC and IP design trends, analysis and market forecasts?
Chip Design now offers customized market research services.
For more information contact Jenna Johnson at 612.598.3446
Dusseldorf September 8-9, 2015
Boston, MA, United States of America 21-23 Sep 2015
Disneyland Hotel, Anaheim CA. October 6-8, 2015
Santa Clara Convention Center, Santa Clara, CA November 10-12, 2015
Santa Clara Convention Center, Santa Clara, CA Jan 19-21, 2016
DoubleTree, San Jose Feb 29-Mar 3, 2016
San Francisco, CA May 22-27, 2016