Published on April 10th, 2013
Shrinking timelines and increasing complexity could be driving many chip design organizations to unknowingly encourage more and more multitasking. Specifically, managers are pushing even more work into the pipeline in hope of getting an early start on projects in order to hit their dates, but the result is increased pressure to multitask across all levels in the organization – from engineers and experts to project managers and executives.
Though we all might tout our ability to multitask, a mountain of research has demonstrated that multitasking destroys efficiency. In fact, design and engineering work requires judgment, thought and creativity, which is precisely the kind of work that is most hurt by multitasking.
Even more important, designing chips and integrated circuits is not a solitary endeavor, and the negative effects of multitasking are amplified when they occur within an organization of interdependent teams.
How Multitasking Causes Organizational Delays
When individuals and teams switch between tasks instead of taking a single task to completion, they keep others waiting for their output. Delays cascade through the workflow, growing ever larger and creating even more pressure to multitask.
In chip design specifically, multitasking is most severe in the testing and verification phase, creating bottlenecks and quality problems. Verification engineers are typically scarce, and their workload increases as iterations and re-spins return for re-verification, all while new designs continue to arrive for a first pass. These constrained engineers quickly get overloaded and are forced to multitask, increasing the chance of error and the amount of time it takes to finish all the work on their plate.
Managers also become highly ineffective in multitasking environments because, when they multitask, even small decisions can take days. The plight of the chip lead is a good example of the inefficiency of multitasking. As they work with different blocks to ensure they can later be integrated and as their time gets stretched thin, teams end up waiting much longer than necessary for the feedback they need to proceed, and delays cascade through the organization.
In addition, with so many work streams to address, it’s very easy for chip leads and verification engineers to lose sight of which tasks are most important. When multitasking is rampant, truly critical issues and genuine bottlenecks can’t be identified, and engineers waste resources solving low-priority problems.
Chip design organizations can immediately reduce organizational multitasking by implementing the following steps:
Step 1: Reduce the number of workstreams in active design by 25 to 50 percent. Reducing the number of open workstreams (e.g., blocks or subsystems) within a project is counterintuitive, but it works. Fewer workstreams in execution mean fewer tasks, and therefore, less confusion about task-level priorities. Moreover, managers and specialized engineers (e.g., chip leads and verification engineers) can be more responsive because they have fewer issues and questions to deal with at any given time. Simply reducing the number of open workstreams by 25 to 50 percent can double task completion rates.
Step 2: Establish a simple rule for task-level priorities. Priorities need to be clearly communicated to everyone in the organization and whenever there is a priority conflict, people need to work on the highest-priority task first. Manual methods of task prioritization are sufficient for small, dedicated teams, but for larger teams or multiple projects with shared resources, task prioritization needs to be automated in some way.
Step 3: Don’t start working on a project or work stream without adequate preparation. Well begun is half done. If design teams have everything in place before starting a project, including all specifications, prerequisites and necessary resources, they will encounter fewer questions and issues during execution. When projects start only once they have a “full kit”, the dependence on managers and experts is reduced and work gets done faster.
By implementing these simple steps, chip design teams can reclaim productivity that was previously wasted due to organizational multitasking. Organizations that have gone down this path find that they do much better than just finishing designs on time; quality is better, rework is less and stress levels are lower for individual contributors as well as managers!
Sanjeev Gupta is the CEO of Realization, a Silicon Valley firm that helps organizations reduce multitasking in engineering and projects. It has helped more than 200 companies realize $3.5 billion in additional cash and profits by finishing projects 20-50 percent faster.