Apple boosts pure-play foundry fortunes
Following patent-infringement disputes, Apple has moved production from Samsung leading the rise of pure-play semiconductor foundry market growth.
The South Korean IDM (Integrated Device Manufacturer) was the primary supplier of applications processors for the iPhone and the iPad, although the likelihood is that TSMC will benefit from the shift. The Taiwanese foundry if the largest, with revenue for 2012 of $16.9billion.
The contract manufacturing market is forecast to rise 21% by the end of this year, compared to last year, according to a report from HIS: Low-Cost Tablet Processor Market Computes New Growth. The first quarter of this year saw an increase of 4% compared to Q4 2012, amounting to revenue of $8.2billion. Meanwhile it also forecasts that the semiconductor industry overall will only achieve 5% growth.
The foundries’ associations with the wireless market rather than components for the PC market is credited for the increase in revenues above that of the overall industry.
The report does warn of potential stumbling blocks, such as the world economy meaning consumers spend less on electronic devices. Similarly, it warns that inventory must be controlled to avoid a decline in manufacturing run rates, as experienced in the second half of 2012. As a result, the manufacturing run rates could decline significantly for the latter half of this year, as customers delay orders.
The information and analytics provider also points out that IDMs like Samsung and Intel are, for the first time, challenging pure-play foundries, as they move to new and more efficient lithographies, prompting technology development. This could lead to shortening technology cycles as well as increased competition. Although potentially threatening to weaker companies, the consumer stands to gain from the multiple-function integration at lower unit costs.
Breakthrough in probing 3S-SICs
Cascade Microtech and imec have partnered to probe 25µm diameter micro-bumps and announce “an important growth engine” for the semiconductor market.
The results are part of nanoelectronics research center’s 3D integration research program with semiconductor industry partners to deliver the technology to high-volume manufacturing.
The partners successfully probed 25µm diameter micro-bumps on a wide I/O test wafer with Cascade Microtech’s automated CM300 probe, using an advanced version of Pyramid Probe technology.
According to Yole Developpement, emerging nanotechnology and medical applications will benefit from 3D technology’s high-density integration. The analyst predicts that the 3D semiconductor market (including 3D-SIC, 2.5D interposer, and 3D WLCSP) will account for 9% of the total semiconductor value by 2017, with logic 3D SoC/SiP (including interposer chips, APE, CPU, FPGA and wide I/O memory) the largest industry to use the platform to meet the speed, power and density requirements.
The CM300 on-wafer measurement system was designed for positioning accuracy and repeatable contact to bring a level of precision that supports smaller pad sizes and the smaller pitch roadmaps. According to Debbora Ahlgren, vice president, Cascade Microtech it “is designed to provide greater alignment accuracy to probe directly on small, fragile micro-bumps. In conjunction with a fine-pitch, low-force Pyramid Probe card, we have achieved consistent, accurate measurements on a wide-IO test wafer using a single-channel, wide-IO probe core with an array of 6 x 50 tips at 40/50µm pitch, with the ability to shrink down to 20µm pitches in the future”. Pyramid Probe technology allows it to meet the fine-pitch, low-force - below 1gf/tip - probing requirements of 3D-SICs.
Erik Jan Marinissen, principal scientist at imec, Leuven, Belgium said: “We are able to hit 25µm diameter micro-bumps with a high level of accuracy due to the probe-to-pad alignment features of the CM300…Pyramid Probe technology enabled us to probe micro-bumped wafers with 40/50µm pitch to the JEDEC Wide-I/O Mobile DRAM standard”.
VIP models meet new memory standards
Verification IP models from Cadence meet the latest raft of memory standards and support languages and methodologies to help design to the new, specialized memories.
Memory is increasingly important in mobile devices. It is used to differentiate smartphones and tablets and to accelerate performance and increase storage. To meet these demands, without a power budget penalty, new memory standards have been introduced, chiefly LPDDR4 (the low power DRAM interface) and Wide I/O 2 (for 3D-IC architectures) for memory interfaces. Both are scheduled to come into effect in the second half of 2014.
Verification IP models for the latest memory standards, the embedded, non-volatile memory, eMMC 5.0; the HMC (Hybrid Memory Cube, aimed at 3D-IC architectures) and DDR4 LRDIMM, as well as LPDDR4 and Wide I/O 2, have been announced by Cadence Design Systems. The models also include trace debug, address scrambling and back door memory access and support leading third party simulators, verification languages and methodologies so that designers can also verify the interfaces to these new, specialized memories.
Martin Lund, senior vice president, Cadence IP Group, identifies the problem: “Designers are faced with more standards being introduced but with shorter lifecycles. At the same time, they need to address power, performance, cost, thermal and packaging constraints. To address this, we are providing access to models supporting as many standards options as possible, so designers can get to market success as fast as possible”.
Intelligent battery cells communicate energy status
A research project in Germany is working to create an intelligent, modular battery which does not expire with the weakest cell but can be bi-directional to stabilize mobile energy storage.
The IntelliBat research project has received €2.6 million in funding from the German Federal Ministry of Education and Research to enhance battery performance with a new approach to the intelligent networking of energy storage systems, electric vehicles and battery powered machines.
By expanding electromobility and the system-wide, bi-directional use of electrochemical storage systems, the projects thinks it will be just a few years before it can ease the burden on and stabilize power grids, with the availability of modular battery systems that communicate with each other.
Today’s battery systems are frequently not expandable, or if they are, it requires considerable effort to add cells or modules. Another obstacle is that cells contained in a battery can have production-related, different capacities which drift apart over time. As the end of a charge process is determined by the capacity of the weakest cell, this can mean that the real, overall capacity of the battery is frequently not used fully.
Li-Ion accumulator (rechargeable battery) supplier, BMZ, Alfred Kärcher, Neutron Mikroelektronik and the Institute for Power Electronic Systems (ELSYS) of the University of Applied Sciences, Nuremberg are collaborating to develop and realize modular battery systems using individually controlled cells that communicate with each other. These systems, based on an active charge balance between the individual cells can be expanded with further cells at any time. Each cell would be charged separately until the maximum capacity is reached, regardless of different cell chemistry, age or capacity, without resulting in larger losses in the overall battery performance.
The four partners expect that, in three years’ time, it will be possible to present the first, fully functional, modular IntelliBat battery system in an electrically powered vehicle.
It is expected to be able to use bi-directional communication with the energy supplier which serves as mobile energy storage, but also be able to feed back electrical energy into the power grid.
In a previous role, as editor of EPD, she created the e-Legacy Awards and also managed and chaired EPN’s 40th Anniversary Forum at electronica 2012.
Are you up-to-date on important SoC and IP design trends, analysis and market forecasts?
Chip Design now offers customized market research services.
For more information contact Karen Popp at +1 415-305-5557
San Francisco, CA December 13-17, 2014
Santa Clara, CA January 27-30, 2015
San Francisco, CA February 22-26, 2015
San Jose, CA March 2-5, 2015
Grenoble, France March 9-13, 2015
San Francisco, CA June 7-11, 2015