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Virtual Prototypes Form ESL Bridge
Sometimes, the best way to understand an abstract phrase like ESL is to focus on understanding the constituent processes.
Electronic-system-level (ESL) development suffers the same semantic burden of any technical phrase containing the word "system." While everyone uses the word freely, each person has a slightly different idea of what it means. Still, there has been a convergence on the general meaning of the process that's most frequently related to ESL development (i.e., "virtual prototyping"). In an effort to better understand the ESL process, I asked a broad range of professionals in the EDA and semiconductor community to share their insights as to the meaning of virtual prototypes. Here are their unvarnished and only slightly edited responses listed in the order in which they were received:
"In the ESL Landscape 2006, we [Gartner-Dataquest] will have three virtual-prototyping categories: 1) Silicon Virtual Prototype and Software Virtual Prototype - the new HOT area, all at the Architectural Level, and 2) Architects Workbench at the Behavioral Level."
--Gary Smith, Chief Analyst at Gartner Dataquest (www.gartner.com)
"The most common definition of "virtual prototypes" is a complete, bit-accurate model of a board or SoC that is sufficient for software developers to use as a target. The main design objective is functional verification of the hardware-software interfaces (e.g., drivers). Low-level software development can then be validated early.
With the more complex architectures in embedded systems, there is a need for a prototyping tool that not only assures functional correctness, but also gives insight into what the performance bottlenecks are in the design. Once these bottlenecks are understood, designers can then change their software to better use the hardware (e.g., partition arrays to fit within cache pages) or configure the hardware to better support the software (e.g., alter the cache size or replacement policy)." --Farzad Zarrinfar, VP of Worldwide Sales and Marketing, Poseidon Design Systems (www.poseidon.com)
"The varied nomenclature reflects the diversity of the tools and flows in the ESL space. ESL is basically anything working in an abstraction level above RTL. Many of the terms relate to the name of the underlying model used to hold the system description (e.g., virtual system prototype). But there are many other aspects of ESL. For example, the first major goal of the ESL flow is to build system descriptions that can be used to verify correct functionality and explore system performance of various architectures of that system. Secondly, ESL flows must support direct implementation of a system description. --Lattice Semicondutor (www.latticesemiconductor.com)
"There is no agreed-upon nomenclature for virtual prototypes at the ES level. However, there are several different use models emerging, albeit with different levels of success. With one exception, they find their analogies in the last "step up" the industry made -- when we went from gates to RTL.
Some so-called virtual prototypes find their use in allowing optimization at the next higher level of abstraction. Another use model for virtual prototypes is usage as golden reference for implementation. These first two use models have not yet been broadly successful because of their hardware focus. The third type of virtual prototypes is used for verification purposes. Here, designers use virtual prototypes built in C, C++, or SystemC to model and verify the design intent prior to HDL coding.
The fourth use model does not really find an analogy at RTL. It is driven by the fact that hardware and software disciplines can no longer be kept completely separate and that a serial design flow would not allow meeting "time to market" requirements. These virtual prototypes are provided by the hardware developer to enable early, parallel software development. Depending on the type of software to be developed, different levels of accuracy are used." --Frank Schirrmeister, VP Marketing, Imperas Inc. (www.imperas.com)
"Virtual platform modeling is an emerging approach to enable early software development. It appears to be highly fragmented by vertical applications and model availability and suffers from a lack of confidence in the correlation of models to silicon implementation. ESL is not just a "level," but a scope. This is an important distinction that needs to be understood. ESL spans the entire design and verification process of the DUT, the software that runs on it, and all the tools and methodologies being managed in the process."
--Ran Avinun, Incisive Marketing Group Director, Cadence (www.cadence.com)
"Unfortunately, there isn't a short and definitive answer to this question because ESL doesn't have a single, realizable definition for today's electronic systems. If you look beyond the goal of ESL to provide the next level of abstraction for electronic systems, you quickly discover that they require merging of what were once standalone, homogeneous systems and now are subsystems. Developers are faced with the challenge of bringing together multiple subsystems into a single system. They realize that the best system-level approach for the development of a programmable embedded-systems application is different than the best approach to develop a signal-processing algorithm for communications. The consequence is that ESL is actually a fragmented space. One of the key niches for ESL is algorithm development." --Larry Melling, VP Marketing at Catalytic Inc. (www.catalyticinc.com)
"ESL-related virtual prototypes provide a way to model and simulate SoC platforms. However, those virtual prototypes have limitations. They define what chip to build, but not what functions should be performed. In other words, they address the architecture of the chip, but not if the design is going to meet its requirements." --Ken Karnofsky, Marketing Director, Signal Processing and Communications, The MathWorks (www.mathworks.com)
"To my personal knowledge, there is no accepted terminology for this. There are virtual platform models at different levels of abstraction with different targets. There are virtual platform models that are used by SW developers to model and debug their SW running on the platform.
Here, you should make a distinction between fast high-level models--which are not cycle accurate, but contain the most important information for SW developers--and cycle-accurate models for SW developers that enable a fully cycle-accurate model for SW validation.
The first models should run extremely fast in order to enable an efficient SW-development process for an army of embedded-SW developers. The second (cycle-accurate) models are significantly slower than the fast high-level models for SW development and serve as a next step after SW development for a cycle-accurate SW validation. Lastly, you have the fully accurate models that serve as a start for the hardware-validation process of the platform." --Peter Vanbekbergen, IMEC Associate VP, design for integrated informationand communication systems (DESICS), (www.imec.be)
"A 'virtual prototype' is an abstract model of a system or system sub-component that is used to provide system functionality early in the design process. For example, a software engineer can use such a VP model to run his or her code modules before the actual hardware is implemented. Or such a model may be used as an executable specification to drive hardware development more accurately. The virtual-prototype model, essential in an ESL flow, must be consistent with the specification. A tool flow that uses a virtual prototype as an input to the hardware creation process ensures this level of consistency." --George Harper, VP Marketing, Bluespec Inc. (www.bluespec.com)
"Today's accepted definition of an ESL-related virtual prototype is "virtual platforms." Virtual platforms are the software model of complete systems. They can execute unmodified production code at high speeds and provide system visibility and control. Because they can be available 9-12 months before silicon is available, virtual platforms enable early integration and validation of the hardware together with the software." --Guri Stark, VP of Marketing, Solutions Group, Synopsys Inc. (www.synopsys.com)
"In talking about a 'system virtual prototype,' it is very important to decide who is the end user. For an application programmer, real-time execution speed is demanded and an application-level "RTOS simulator" solution provides that capability.
On the other hand, the system designers and verification engineers are concerned about hardware-software system integration--needing higher accuracy in the hardware aspects of system behavior. Here, the task is well served by the capabilities available in a TLM environment. They permit hundreds-of-times faster execution than RTL models, and thus more tests and greater analysis than RTL permits." --Bill Chown, Product Line Manager, System-Level Engineering Division, Mentor Graphics (www.mentor.com)
"A virtual prototype is typically a software-only model that describes an electronic system of hardware and software created prior to physical implementation. This early-stage model allows a design team to simulate the HW and SW together and begin to make tradeoffs that can be far reaching. Benefits of such a prototype are: an optimized system, bugs detected and fixed earlier, deeper understanding of how HW and SW should be partitioned, and an unambiguous executable specification used throughout the entire implementation process."
--Daniel Payne, EDA Marketing Consultant
"In the ESL Landscape 2006, we [Gartner-Dataquest] will have three virtual-prototyping categories: 1) Silicon Virtual Prototype and Software Virtual Prototype - the new HOT area, all at the Architectural Level, and 2) Architects Workbench at the Behavioral Level."
--Gary Smith, Chief Analyst at Gartner Dataquest (www.gartner.com)
"The most common definition of "virtual prototypes" is a complete, bit-accurate model of a board or SoC that is sufficient for software developers to use as a target. The main design objective is functional verification of the hardware-software interfaces (e.g., drivers). Low-level software development can then be validated early.
With the more complex architectures in embedded systems, there is a need for a prototyping tool that not only assures functional correctness, but also gives insight into what the performance bottlenecks are in the design. Once these bottlenecks are understood, designers can then change their software to better use the hardware (e.g., partition arrays to fit within cache pages) or configure the hardware to better support the software (e.g., alter the cache size or replacement policy)." --Farzad Zarrinfar, VP of Worldwide Sales and Marketing, Poseidon Design Systems (www.poseidon.com)
"The varied nomenclature reflects the diversity of the tools and flows in the ESL space. ESL is basically anything working in an abstraction level above RTL. Many of the terms relate to the name of the underlying model used to hold the system description (e.g., virtual system prototype). But there are many other aspects of ESL. For example, the first major goal of the ESL flow is to build system descriptions that can be used to verify correct functionality and explore system performance of various architectures of that system. Secondly, ESL flows must support direct implementation of a system description. --Lattice Semicondutor (www.latticesemiconductor.com)
"There is no agreed-upon nomenclature for virtual prototypes at the ES level. However, there are several different use models emerging, albeit with different levels of success. With one exception, they find their analogies in the last "step up" the industry made -- when we went from gates to RTL.
Some so-called virtual prototypes find their use in allowing optimization at the next higher level of abstraction. Another use model for virtual prototypes is usage as golden reference for implementation. These first two use models have not yet been broadly successful because of their hardware focus. The third type of virtual prototypes is used for verification purposes. Here, designers use virtual prototypes built in C, C++, or SystemC to model and verify the design intent prior to HDL coding.
The fourth use model does not really find an analogy at RTL. It is driven by the fact that hardware and software disciplines can no longer be kept completely separate and that a serial design flow would not allow meeting "time to market" requirements. These virtual prototypes are provided by the hardware developer to enable early, parallel software development. Depending on the type of software to be developed, different levels of accuracy are used." --Frank Schirrmeister, VP Marketing, Imperas Inc. (www.imperas.com)
"Virtual platform modeling is an emerging approach to enable early software development. It appears to be highly fragmented by vertical applications and model availability and suffers from a lack of confidence in the correlation of models to silicon implementation. ESL is not just a "level," but a scope. This is an important distinction that needs to be understood. ESL spans the entire design and verification process of the DUT, the software that runs on it, and all the tools and methodologies being managed in the process."
--Ran Avinun, Incisive Marketing Group Director, Cadence (www.cadence.com)
"Unfortunately, there isn't a short and definitive answer to this question because ESL doesn't have a single, realizable definition for today's electronic systems. If you look beyond the goal of ESL to provide the next level of abstraction for electronic systems, you quickly discover that they require merging of what were once standalone, homogeneous systems and now are subsystems. Developers are faced with the challenge of bringing together multiple subsystems into a single system. They realize that the best system-level approach for the development of a programmable embedded-systems application is different than the best approach to develop a signal-processing algorithm for communications. The consequence is that ESL is actually a fragmented space. One of the key niches for ESL is algorithm development." --Larry Melling, VP Marketing at Catalytic Inc. (www.catalyticinc.com)
"ESL-related virtual prototypes provide a way to model and simulate SoC platforms. However, those virtual prototypes have limitations. They define what chip to build, but not what functions should be performed. In other words, they address the architecture of the chip, but not if the design is going to meet its requirements." --Ken Karnofsky, Marketing Director, Signal Processing and Communications, The MathWorks (www.mathworks.com)
"To my personal knowledge, there is no accepted terminology for this. There are virtual platform models at different levels of abstraction with different targets. There are virtual platform models that are used by SW developers to model and debug their SW running on the platform.
Here, you should make a distinction between fast high-level models--which are not cycle accurate, but contain the most important information for SW developers--and cycle-accurate models for SW developers that enable a fully cycle-accurate model for SW validation.
The first models should run extremely fast in order to enable an efficient SW-development process for an army of embedded-SW developers. The second (cycle-accurate) models are significantly slower than the fast high-level models for SW development and serve as a next step after SW development for a cycle-accurate SW validation. Lastly, you have the fully accurate models that serve as a start for the hardware-validation process of the platform." --Peter Vanbekbergen, IMEC Associate VP, design for integrated informationand communication systems (DESICS), (www.imec.be)
"A 'virtual prototype' is an abstract model of a system or system sub-component that is used to provide system functionality early in the design process. For example, a software engineer can use such a VP model to run his or her code modules before the actual hardware is implemented. Or such a model may be used as an executable specification to drive hardware development more accurately. The virtual-prototype model, essential in an ESL flow, must be consistent with the specification. A tool flow that uses a virtual prototype as an input to the hardware creation process ensures this level of consistency." --George Harper, VP Marketing, Bluespec Inc. (www.bluespec.com)
"Today's accepted definition of an ESL-related virtual prototype is "virtual platforms." Virtual platforms are the software model of complete systems. They can execute unmodified production code at high speeds and provide system visibility and control. Because they can be available 9-12 months before silicon is available, virtual platforms enable early integration and validation of the hardware together with the software." --Guri Stark, VP of Marketing, Solutions Group, Synopsys Inc. (www.synopsys.com)
"In talking about a 'system virtual prototype,' it is very important to decide who is the end user. For an application programmer, real-time execution speed is demanded and an application-level "RTOS simulator" solution provides that capability.
On the other hand, the system designers and verification engineers are concerned about hardware-software system integration--needing higher accuracy in the hardware aspects of system behavior. Here, the task is well served by the capabilities available in a TLM environment. They permit hundreds-of-times faster execution than RTL models, and thus more tests and greater analysis than RTL permits." --Bill Chown, Product Line Manager, System-Level Engineering Division, Mentor Graphics (www.mentor.com)
"A virtual prototype is typically a software-only model that describes an electronic system of hardware and software created prior to physical implementation. This early-stage model allows a design team to simulate the HW and SW together and begin to make tradeoffs that can be far reaching. Benefits of such a prototype are: an optimized system, bugs detected and fixed earlier, deeper understanding of how HW and SW should be partitioned, and an unambiguous executable specification used throughout the entire implementation process."
--Daniel Payne, EDA Marketing Consultant
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