Published on October 27th, 2006

Max's Chips and Dips: Prisoner PCell Block A

My *lack* of knowledge with regard to the analog domain is encyclopedic, so I was enthralled to be regaled with a tale so terrible as to make even the strongest amongst us quiver at the knees.
Who could forget the classic Australian television program "Prisoner Cell Block H"? The prison walls wobbled if anyone sneezed and the acting was so dire as to set new standards of direness. On the bright side, I learned a new word – "Drongo" – which has served me well for more years than I care to remember.

So why am I waffling on about the creme de la creme of antipodean soap operas? Well, I've just discovered that analog design engineers are being held prisoner by something called PCells (hence "PCell Block A", where 'A' equals "Analog" – come on, work with me on this).

As we all know, the analog content of today's sophisticated System-on-Chip (SoC) devices continues to rise at an alarming rate (at least, it's alarming to digital engineers) – "The death of analog has been greatly exaggerated," as Mark Twain might say.

Now, the analog domain tends to be a somewhat mysterious world to most of us. Truth to tell, my lack of knowledge is encyclopedic in this area, so I was enthralled to be regaled with a tale so terrible as to make even the strongest amongst us quiver at the knees.

The OpenAccess Database
Let's start with some good news, which is the OpenAccess database. Prior to this little scamp, the default way of communicating IC design data between different design tool vendors with incompatible databases was GDSII (Figure 1).

Figure 1
Figure 1: Life before OpenAccess.

GDSII was possibly the worst choice as a mechanism for interchanging design data, but it was pretty much the only game in town with regard to being an industry-standard format that everyone supported in one way or another.

Meanwhile (and we're still way back in the days of yore here – toward the end of the previous millennium, in fact), the OpenAccess database first saw the light of day in the mid-1990s as Cadence's next-generation data model. Then, in 1999, as a really cool forward-thinking gesture, Cadence decided to donate OpenAccess to the electronics design community under the auspices of the Si2 Organization ( As the folks at Si2 say on their website:

OpenAccess is a community effort to provide true interoperability – not just data exchange – among IC design tools through an open standard data API and reference database supporting that API for IC design.

The OpenAccess promise is that tools from multiple vendors can interoperate seamlessly on the same database (Figure 2). This is very exciting, especially since a lot of companies have really bought into the OpenAccess concept.

Figure 2
Figure 2: The OpenAccess promise.

She sells PCells on the sea shore. . .
You'll have to forgive me for the puns – I'm giddy with excitement – it's Friday afternoon as I pen these words and I'm looking forward to an evening of fun and frivolity. But we digress. . .

Another jolly good idea is that of PCells, which stands for "Parameterized Cells". The origin of this concept is lost in the mists of time, but some say it started with Calma, which was acquired by Valid, which was acquired by Cadence. Irrespective of the route by which PCells came to be, however, it was Cadence who made them stick.

On the one hand, PCells are sort of equivalent to the standard cells used by digital logic designers; on the other hand they are completely different. Let me explain. In the not-so-distant past, analog engineers generated the physical representations of their designs as a collection of polygons. This was time-consuming, error-prone, and – even worse – not much fun.

The solution is to use a PCell, which we may think of as a parameterized chunk of code that generates the final analog cell. Consider a simple transistor, in which one can parameterize all sorts of things, starting with the width and length of the channel. In some cases, these little rascals (PCells) can have 50 parameters or more.

Anyway, a PCell designer designs a PCell, which is then added to a library, which is – in turn – distributed to a gaggle of layout designers. When working on a design, a layout designer will use his (or her) layout application to access the PCell library and select a PCell of interest. At this point, the PCell (which, you will recall, is actually a small program) runs using its default parameters and generates the physical layout for that cell. This instance of the physical layout immediately appears on the layout application's screen. The layout designer can then access and "tweak" the PCell's parameters as required, which will cause the PCell to be re-executed and to generate a new, custom "flavor" of the cell.

The PCell concept is fantastic for productivity and repeatability, but there is a tiny problem – a "fly in the ointment" as some may say. . .

Oh dear, oh dear, oh dear. . .
So here we are in 2006, and there are a few harsh truths we have to face. First, PCells are currently used in more than 85% of all analog and mixed signal designs. Second, Cadence "own" the back-end of analog and mixed-signal designs (the reason for this is simple – they flat-out have the best tool). Third, the vast majority of PCells in the world are written in SKILL, which is a Cadence-proprietary language.

But the real "knee in the groin" is the fact that proprietary PCells erect a new barrier, because they cannot be interpreted by tools from other vendors. The default way around this is to stream out to GDSII, which eliminates many of the benefits of OpenAccess and effectively stalls interoperability (Figure 3).

Figure 3
Figure 3: The grim reality (with regard to PCells).

But wait, there's hope. . .
Now, if you are starting a new company and don’t have any legacy PCells to worry about, then there is a solution today – PyCell Studio from Ciranova ( Using this little rapscallion, you can generate OpenAccess PCells in the Python language. In turn, these OpenAccess PCells provide you with the ability to choose the other tools you wish to use in your design flow.

But what about existing design houses. There are estimated to be around 500 PCell designers in the world (there are also around fifty thousand custom layout designers actually using these PCells). This means that 500 engineer-years-worth of PCells are created every year, and you can bet your little cotton socks that no one wants to throw all of that effort away.

Well, fear not my braves, because there's nothing to fear but fear itself (as my dear old dad used to say). Those clever chaps and chapesses at Ciranova have been toiling furiously on a solution to allow legacy PCells created in proprietary languages to be fully usable in an OpenAccess environment. Alas, I am permitted to say no more at this time, except . . . watch this space!
Clive (Max) Maxfield is author of Bebop to the Boolean Boogie (An Unconventional Guide to Electronics) and The Design Warrior's Guide to FPGAs (Devices, Tools, and Flows), Max is also the co-author of How Computers Do Math, featuring the pedagogical and phantasmagorical virtual DIY Calculator.

In addition to being a hero, trendsetter, and leader of fashion, Max is widely regarded as being an expert in all aspects of computing and electronics (at least by his mother). Max was once referred to as "an industry notable" and a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way

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