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Published in August/September 2006 issue of Chip Design Magazine

Military Seeks Systematic Approach to IC Design

The EDA community is focusing on point solutions while system-level development continues to evolve.
NOTE: Typically, our Focus Reports provide survey-style tables with results that outline the technology, tool vendors, platforms, etc. Because this issue is focused on technology in the defense community, however, we've had to deviate from the standard format. Why? In most cases, the respondents couldn't officially respond to the submitted questions. Yet they could share their activities and emerging trends with us as long as the company or a particular representative weren't named as the source. Because this information would be very diffi cult to obtain without the input of critical defense-related companies, we agreed to a somewhat anonymous style.

For the first time in many years, next-generation technology trends and the call to action of the methodologies for implementing these bleeding-edge technologies have taken a second-place role. The spotlight is now on the resuscitation, preservation, and migration of the legacy and orphaned data that is in existing system designs.

The military marketplace has long been the haven of the IDMs and other specialty systems providers. As a result, the long life cycle for parts (typically 20+ years) has rewarded these providers with very long-term continuity of process, extensive reliability and test knowledge, and robust re-use/reconfiguration capabilities. A few of the costs associated with this business are long-term maintenance/non-obsolescence of large-geometry process technologies. In addition, there is the cost of staffing the in-house development-level CAD groups to supplement the tools that are available commercially. At the same time, support is needed for the revision-specifi c versions of commercial tool releases that cannot be upgraded or patched due to re-qualifi cation issues.

As detailed in the accompanying article by Mauer, Milanowksi, et al, the dynamics of the custom-versus-COTS-versus-foundry- ASIC tradeoff have shifted. The results of the survey have placed a new emphasis on excising designs. The design challenges that were identified by the survey questions fall into the categories of legacy data, orphaned data, legacy process, orphaned process, legacy tools, and orphaned tools.

Legacy data is defined by the client base as data that exists in current operating parts. The legacy data is functional but has been used in multiple designs. As a result, the extent of the true design block-exclusive of BIST, application-specific clocking, and parametric- specific performance aspects (radiation hardness, matching, off set, leakage, etc.)--is not obvious from the observation of the available engineering data. This design data also tends to be "final form" in that it is"release revision" data without any documentation or fi nal sign-off simulation results.

This legacy-data problem is a methodological issue, as new projects aren't being archived in any manner to try to avoid these issues. Historically, it hasn't been a design concern. The predominant technique for the resolution of legacy design migration is to hand-reverse engineering and then re-engineer the design. This solution has high manpower costs. For outsourced designs, it also has significant security issues.

Another design challenge identified by the survey questionnaire concerned orphaned data. This type of data is similar to legacy data with the exception of a lack of existing engineering "parental" heritage. The majority of orphaned data was created under joint development agreements ( JDAs) between large manufacturing companies and smaller, more innovative design firms. As a result of life cycle and the semiconductor food chain, these small design resources were either not maintained as JDA partners, didn't survive the localized marketplace battles of the semiconductor wars, or completed a full cycle including an M&A cycle that was shorter than the product life cycle required by the military client. As a result, the data that does remain is incomplete, incoherent, incompatible with modern EDA tools, and basically unusable from a leveraged IP and parts basis (once the EOL inventory of the product is depleted). Once again, the predominant technique for resolving orphaned design migration is to hand-reverse engineering and then re-engineer the design.

Long-term legacy-process issues have faced the military and long product life (aircraft/automotive/telecom infrastructure) industries since they began. Historically, the problem of retaining process life-cycle and manufacturing capabilities has been dealt with through contract and business negotiations rather than technical issues. This problem typically didn't result in the IDM model, in which the life-cycle management of the process and the revenue generated from the IP being built with it were all managed by a single party.

Recently, the high cost of wafer-fabrication-facility construction (for processes beginning with 0.18 um) changed the dynamics of "old process" continuity. To achieve a schedule-acceptable ROI on the fab upgrade, the legacy facilities were dismantled and sold. The facility space for the new process could then be maximized. At this point, legacy-process access for an end customer is through the "unenforceable" second-source agreement or a "right of survivorship" clause.

The second-source agreements are seen as"unenforceable" because there is no direct control by the end customer or primary process provider that requires the secondary IDM to not make the same facility upgrade and obsolescence decision that was made by the primary provider. As a result, the end customer doesn't actually benefit from the second-source agreement other than completing a check box on the forms that were in place in the early '60s.

Although the"right of survivorship" clause off ers some advantage from an engineering basis, it isn't really a practical benefit for the manufacturing aspects of the problem. The engineering side does benefit, as the primary process provider has to document what they are building (from both an electrical specification and optical target perspective). That provider must then transfer this information to the end customer. As a result, the customer can at least know what he or she has been buying and what to look for in a replacement.

This is an important issue as modern processes--say a 0.18-um design that is run at a major foundry--can actually be a design specifically targeted for one of 26 processes with diff erent options of devices, Vt, operating voltages, interconnect layers, interconnect materials, gate materials, substrate and starting materials, etc. Each of these options can be considered "standard digital 0.18 um" depending on what the application requires at the time.

The intent of the "right of survivorship" clause was to provide major customers with the ability to self-identify alternate sources of manufacturing in case the primary provider was no longer able to make the parts. In reality, that level of detailed knowledge is never imparted to an end client. In addition, the information required to transfer this level of knowledge isn't kept in a transportable form. It is usually only in a "manufacturing floor and equipment-model-specific" format for the primary provider's facility. Finally, the process technology is considered "proprietary IP" even though the process at issue is at EOL and the development costs were amortized decades ago. It will most likely be discussed in the courtrooms longer than it is in the engineering design rooms.After all, the primary providers would rather see the process withheld rather than generate revenue for another manufacturer.

Yet another design challenge identified by the survey questionnaire concerned the fairly new concern about orphaned processes. These processes are a dynamic fallout of the shift from true IDMs to the fab "light" and fabless semiconductor providers. In these scenarios, there are no business or engineering capabilities to guarantee that processes will be maintained. Nor is there visibility of the anticipated life cycle of the processes. The customer is buying tested and burned-in packaged parts only. That customer must rely on traditional warehousing and stocking methodologies to ensure product availability and EOL purchases.

For standard parts and COTS-based designs, this approach works well. For complex ASICs or platform-based products, however, there are issues with this format. Specifically, long-term process-reliability data is generally not available. This includes the transfer of necessary electrical and process target information to be able to check on the status of long-term storage. It also involves validation of the parametric-process fallout from the currently contracted facility.

There's no direct contractual arrangement between the end customer and the fabrication facility. As a result, there's no yield optimization and centering, reliability centering, or electrical data transferred to indicate process status or even the country of origin for the process technology being used. When these processes are EOL'd, the end customer has very few options regarding where to go and even to understand where they've been.

The legacy EDA tools and CAD environments have been a problem for the military industry for over 30 years. This issue stems from the use of single versions of a software product over a full product life cycle without the implementation of patches and their associated re-qualification cycles. Most of the legacy tools work on industry-standard interfaces. They have the luxury of perpetual licensing. Even though the performance may not be optimized for current hardware and their applicability toward new designs may not be great, the capabilities of the tools are more than adequate on existing designs and for migration tasks. The majority of the legacy tools come from the three major EDA suppliers. Or they were created in-house with an engineering staff that is capable of supporting the code base.

The industry-standard formats used are for netlist, library and timing descriptions, and physical design views. The electronic meta data associated with the tools (i.e., the intermediate binary- form data internal to tools) is generally not part of the design archives. The legacy tools are the ones that are usable in design reviews and for validating design archives.

Orphaned tools are a new issue for the military. A number of new IP blocks and chip designs are relying on design sign-off and reliability analysis from small startup EDA firms. Th ese firms have a business life cycle that's significantly shorter than the products in which they're used. The legacy tools use industry- standard interface formats and are based on perpetual licenses, so future operations of the tools are ensured. In contrast, these newer orphaned tools tend to interface with version- and patch- specific internal meta data. In addition, they have only annualized licensing. These two features make design migrations that utilize non-industry-standard interfaces one of the leading business and methodology issues in military design today. Figure 1 summarizes the relative ranking of the importance of these issues.

Figure 1
Figure 1: This pie chart priorities the severity of major methodological issues in military chip design.

METHODOLOGICAL RESPONSES
Now, let's consider the methodology responses to the current design issues. First, there's the issue of legacy data. At this time, most companies are working on in-house automation schemes to handle the legacy-data problem. This issue isn't on the priority list of most EDA vendors. As such, there is no consistency on an industry-wide solution to this issue. Several groups (the FSA and SI2/Accellera with the OK Initiative) are attempting to address this issue for new IP and PDKs. The solutions are not backward-process or design compatible, however.

The orphaned-data problem is a relatively new issue. As such, there are no industry-wide trends to address this market other than addressing the creative and budgeting edge of the design migration process.

How about the methodological response to the concern of legacy processes? The short story on a business resolution of this issue is, "It ain't gonna happen--never has, never will. "Take the engineering solution for the current methodology and use this information as ground zero. If you're lucky enough to get all of this data and not start in a hole, you can build your re-engineered design on top. Otherwise, at least you know when you're out of the hole.

The orphaned-process problem also is a relatively new issue. The main issues associated with this aspect of design migration and methodology are business-related. At this time, they involve getting access to the necessary technical information required rather than any major technical challenge. The globalization of the wafer fabrication industry--even with the selection of "domestically located" suppliers--has further complicated the task of information collection and process selection for regulatory compliance.

The legacy-tool issues are long understood. They also have been one of the driving forces for in-house tool development for the past couple of decades. The reliance on industry-standard interfaces for more and more design views (now expanding to test and assertion as well as DFM views) will keep legacy tools a baseline revenue generator for the major commercial EDA vendors. It also will drive continuity on the multiple divisions of the diversified military organizations. This has been the traditional focus of the military in-house CAD programs.

Orphaned tools represent a major concern for the military electronics community. The recent change in the EDA exit model (sub-four-year life cycle, exist through M&A, and EOL of the product in five years) has been one of the new centers of attention for the military design community. It has forced a tradeoff between whether a needed analysis should be performed to guarantee a reliability figure or if it's better to skip the test and simplify the legacy data and design portability. This can be done by skipping a short-life-cycle, single-function specialty EDA tool. As DFM, architectural design, and system-level application software become more critical portions of the design process, the orphaned-tool issue will rise in importance.

Overall, the CAD teams in the military and high-reliability marketplace have a lot to keep them occupied for the next few years. It appears that they'll be keeping busy without a lot of support from the EDA vendors. After all, those vendors are still addressing point performance and optimization issues, rather than the systematic design, data, and flow issues that were voiced to us as major issues.
Pallab Chatterjee is CTO of SiliconMap LLC. He has over 20 years of experience in commercial/military and medical industry design and project management. Chatterjee can be reached at Info@siliconmap.net.

Diane Chatterjee is the President of SiliconMap, LLC.

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