Our e-letters are targeted to specific EDA and chip development topics. Each monthly e-newsletter includes exclusive viewpoint pieces, detailed technical pieces, timely product and application news (national and international), book reviews, design resources end event listings. Subscribe now!
Complementing Chip Design magazine, this e-newsletter covers the latest developments in the world of chip design and test. All aspects of chip modeling, architecture, design, test and manufacture are covered, from EDA tools to digital and analog hardware issues. Other coverage areas include hard and soft IP - for both hardware and software, design and test methodologies, current technologies and ever-shift standards.
Semiconductor intellectual property cores, or IP, are more than just reusable units of chip design. They are constantly expanding libraries of great ideas that enable designers to efficiently build on the success of others. They make today's rapid development of ASICs, FPGAs and SoCs possible. Our role is to provide the best IP news, opinions, and articles available. Our goal is to help you become the smartest, fastest, most effective designer you can be.
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For more information contact Jenna Johnson at 612.598.3446
Dusseldorf September 8-9, 2015
Boston, MA, United States of America 21-23 Sep 2015
Disneyland Hotel, Anaheim CA. October 6-8, 2015
Santa Clara Convention Center, Santa Clara, CA November 10-12, 2015
Santa Clara Convention Center, Santa Clara, CA Jan 19-21, 2016
DoubleTree, San Jose Feb 29-Mar 3, 2016
San Francisco, CA May 22-27, 2016