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Contents: June / July 2005

The IEEE Embraces a Systems View for EDA Council By John Blyler

Product News By John Blyler

Navigating the Silicon Jungle: FPGA or ASIC? FPGA, structured-ASIC, and ASIC design implementations can be differentiated by tradeoff studies and an understanding of the basics behind each target platform. By John Blyler

A Tale of Two Languages: SystemC and SystemVerilog To understand the important role of SystemVerilog and SystemC in complex hardware-software system designs, it’s essential to set the right context. By Victor Berman

Start at the Top to Reduce Re-Spins for Analog-Digital Chips A next-generation verification platform for mixed-signal SoC design promises to resolve system-level-performance and full-chip-simulation concerns. By Geoffrey Ying

Manage Complexity in Nanometer SoC Designs To handle complex designs, tools must address a variety of scaling, optimization, automation, and reuse issues. By Dr. Jason Cong

Advantages Abound for a Conversion-Free, Low-Cost Path to Volume Production Customer-specific FPGAs provide another option for risk reduction in the migration path from FPGA to volume production. By Balaji Thirumalai and Gokul Krishnan

Is Bigger Better? What Does the Future Hold for Small IP Providers? By Michael Kaskowitz and Hal Barbour

IP Reuse Gets a Reality Check The selection and packaging of IP have been significantly improved with the VSIA's "apples-to-apples" Quality IP metric. By Kathy Werner

In Search of an ESL Design Methodology The definition and concept struggles of today’s ESL resemble the age-old tale, “The Six Blind Men of Hindustan and the Elephant.” By Gary Smith

Solution Providers

When You Have a Hammer, Everything�s a Nail!

Accelerating Algorithms in Low Power, High Performance Architectures

Providing Solutions for Your Design Problems

Wireless Applications Take Center Stage

Scott Brown, Director, RF Products, Micrel Inc.


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