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What’s Analog Rails all About?

Last week I had the opportunity to visit with Get2spec CEO Cliff Wiener and we discussed the upcoming release of their Analog Rails product, advertised to leapfrog past the Cadence Virtuoso suite. Cliff is definitely passionate about the needs of the designer; an area he maintains has not been serviced well by the current EDA suppliers. The following is a summary of the discussion I had with Cliff following a demonstration of the Analog Rails suite.
What is your background in the semiconductor industry?

I have spent 28 years in the business to date. The first 10 years was doing analog design with pen and paper followed by 5 years learning and designing with CAD tools. From there I moved into driving analog and RF design methodologies for 7 years at National Semiconductor, and Motorola Semiconductor prior to starting Get2spec / Analog Rails over 6 years ago.

What motivated you to develop the Analog Rails suite of tools?

There were really two reasons: 1) Frustration with CAD vendors, and 2) I knew how to automate analog. Let me expand. The leading vendor relied on enormous CAD teams, and the tool was overly complex and very generic. There was no built-in intelligence to the tool. I decided to make an analog expert system where no brainers are automatically put into the tool, and all the tools work together through the entire flow. An example of tool intelligence is a simulator that provides information to the placer and the router. Properly using this information, coupled with adhering to analog and RF design methodologies, allows automation to occur.

What sets the Analog Rails suite apart from the others?

The other EDA companies in analog are focused on verification and we are focused on creation. We believe in a correct by construction approach. We automate, they iterate. This is especially important at smaller feature sizes, where the STI effects are more severe. The circuit designer needs the parasitic information right away. We also believe that time to market is everything! Very few new topologies are being created in analog nowadays. The key differentiator today is who can produce the chip according to specification first – first in wins.

Do you have a proudest moment in the development effort that you could share?

Automating switched cap ADC’s (Cyclic, Pipeline, etc). The analog switches are a pain in the butt, but we have the technique down pat. I heard that analog automation is impossible, so doing the impossible is something to be proud of.

Ask me when we release our “design while you sleep” mode. It will optimize, place, route, RC extract and then re-optimize. It’s like the lady from easy-off stating that she is cleaning her oven…while she sleeps. We have the equivalent…for geeks.

What is the expected availability?

April 12th, 2010. We are actively demonstrating the product today.

3 Comments

  • Mar 29th 201019:03
    by Debi Roeckelein

    Awesome tool. I have seen the demo and it is far surperior to anything that Cadence has to offer.

  • Apr 2nd 201017:04
    by Daniel Payne

    Jeff,
    Thanks for the update interview on Analog Rails. I think that real success will be demonstrated when we read from the first customers and users of Analog Rails tools.

    My view is that the IC layout market is already crowded with familiar suppliers:

    Cadence
    Mentor
    Synopsys
    Magma
    Tanner EDA
    CiraNova
    SpringSoft

    All the best to Analog Rails in entering this EDA segment.

  • Jul 15th 201020:07
    by Dan Carlson

    This is vaporware. I’ve been listening to this guys claims for years. Where’s the beef?

    When is it going to be released? How many customers are using it?

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