NPD Management Corner

EDA360 – A Silicon System Vision we must Build Upon

Cadence began publicizing the EDA360 vision back in April of this year and since that time there has been a fair share of discussion, both negative and positive comments; and certainly some confusion. I was definitely a member of the confused and negative camp; that is until I spent enough time to really research and understand what this vision was trying to tell us.

EDA360 is not a tool roadmap… at least not today, it is purely a vision based on the enlightenment of John Bruggeman, Cadence CMO and his team. They have seen the light, understand the pain of putting together an embedded system today and have identified a vision of where EDA needs to be in order to significantly remove that pain and increase productivity in embedded system solutions. It’s not the end, barely even the beginning, but it is a vision suitable for developing a strategy from, and that my fellow designers has significant value.

Over the last week I have been studying the EDA360 vision document and have extracted my perceptions of what was being said, merged in with my history in design along with my biases, and created a picture of the EDA360 vision. I am a visual kind of person, so for me to fully digest the scope of EDA360 I needed to turn it into a diagram. Below you can see a depiction of EDA360, “as Jeff sees it”.

Jeffs View of the EDA 360 Vision

From my perspective there were three significant takeaways from the vision:

• Product realization must start with the end applications; actual hardware design needs to move much further down the development pipe than it is today. We are designing complete application enabled systems, not just chips.
• An all-encompassing verification platform is one of the most critical barriers to realization of this vision and is the key to stitching all the abstraction levels together. This platform must cover full applications running at an early 100% TLM level through the same applications running in a mix of abstraction levels that include RTL, gate, transistor level as well as TLM. The verification bench must also include hooks into the physical end user world such as keyboards and displays. A tall order indeed, however a pivotal requirement nonetheless.
• A common “system” database that allows downstream access to design history as the system migrates towards finer levels of abstraction. Data should never be lost or regenerated. Leveraging historic development data is crucial for both quality and productivity.

It would be difficult to argue that this vision, as a beginning, is not where we need to be headed in the semi industry. As John points out in the vision paper, realization of this ideal system development environment will not happen within one EDA supplier. There are many pieces to solving the systems puzzle and many companies have something to offer towards this ultimate goal. I am curious what inputs Synopsys or Mentor have on the EDA360 vision? Achievement of this game changing visualization will require multi-company structure, organization, planning, execution and funding. Sounds like a consortium, maybe the Silicon System Crusaders (SSC). Let’s start talking and provide a cure for “Terminal Sameness” in embedded systems.