Reflections on UVM 1.0
As you may have already seen in the blogosphere and in the tweetdom, the Accellera Board today approved the release of UVM 1.0. This release is a major accomplishment from a technical standpoint, but it also represents a triumph of the collective will of the Electronics/EDA industry. If one flashes back to January 2008, the [...]
Thoughts On SystemC Users’ Groups
I ate breakfast a few weeks ago with Gabe Moretti of GabeOnEDA fame—always a pleasant event. During our discussion, Gab opined that the Open SystemC Initiative (OSCI) was superior to other front-end standards organization because of its SystemC Users’ Groups like NASCUG, ESCUG, the Taiwan SystemC users’ Group, SystemC Japan and so forth. At a [...]
SystemVerilog in Japan
During the EDSF show held in Yokohama in late January, there were several meetings between members of JEITA and members of the IEEE Design Automation Standards Committee (DASC). These meetings were designed to bring the various organizations‘members up to speed on the other groups’ activities. This is important, given that there are overlapping interests among [...]