Posts by stan:
Looking at DVCon 2012
DVCon 2012 ended yesterday, March 1. Rather than recap the entire conference, I’d like to focus on the “high energy” surrounding the event, starting with the vendor exhibitions. Each year I like to walk through the DVCon exhibition hall, looking for new technology, meeting old acquaintances and so forth. In very down times, I could have amped up my walking and run through the exhibition hall unimpeded, but this year, very slow walking was my only option. This was due to both the amount of people in the hall and the number of new (and newish) exhibitors present—not to mention the number of familiar faces I encountered.
Moreover, most of the people who were in hall were not just there for the free beer/wine and munchies. A rep at one of the large EDA vendors told me that they had no letup of potential customers during the entire Tuesday exhibition through the first half of the Wednesday exhibition, which is when I spoke with him. This sort of report was echoed by other vendors, and passed the eyeball test.
I was also impressed by the number of unfamiliar (at least to me) companies that were on the exhibition floor. The fact that these sorts of new companies keep emerging in the already well-covered function verification and system-level design spaces highlights the increasing importance of system design & function verification as SOCs become increasing complex and design cycles become shorter. Of course, the fact that these new companies see DVCon as a cost-effective way to reach their target audience is a testament to the increasing status of the conference.
Finally, there was noticeable change in what I might term the “employment dynamics” at this year’s DVCon. In the past few years (not so much in 2011, but certainly in 2008-10) lots of the attendees came to DVCon with resume in hand, looking for a job. This was not surprising, given the dismal economy at the end of the last decade. What somewhat surprised me this year was the number of potential employers who used DVCon as a venue to both seek and speak with potential new employees. I inadvertently overheard a number of such conversations this week both in the DoubleTree’s Sprigs restaurant and in that hotel’s executive lounge on the 10th floor.
Indeed, this year, instead of being asked if Cadence had any job openings, I was asked several times by “user companies” if there were any people I could recommend in the industry who might be looking for new job opportunities. This was quite a change from the somewhat depressing atmosphere of a few years ago, and I can only hope that this is a trend that will continue. More jobs are better.
No, DVCon is not DAC, and it does not pretend to cover the entire electronics design flow. However, it does provide a high energy place for technologists focused on the front-end of that design flow to gather, listen to papers, panels and tutorials that explain new technologies, and also to check out the various vendors that have implemented these technologies.
John Aynsley and The IEEE SystemC LRM
The Accellera Systems Initiative has announced that John Aynsley, the CTO of Doulos. will be awarded that organization’s Technical Achievement for his “contributions to SystemC”. In the press release, it is noted that John was a member of the IEEE P1666 Working Group (WG) that recently produced an updated version of the SystemC Standard. As the [...]
Get Ready ‘Cause Here It Comes: Accellera Systems Initiative Day @ DVCon
Lots of ink has been spilt (in a good cause) in reporting on the new Accellera Systems Initiative organization. However, many of you may still wonder how you can get an in-depth view on what is happening in this new organization that resulted from the merger of Accellera and the Open SystemC Initiative (OSCI). The [...]
Why the OSCI-Accellera Merger?
By now most of you will have heard and read about the merger Accellera and OSCI into the Accellera Systems Initiative. A question that may linger after reading various press accounts is “why a merger”? There are, of course, synergies in standards to be discovered and exploited– anyone with even a rudimentary knowledge of current EDA [...]
Larry, Larry, Larry!
On Sunday, December 4, Larry Saunders received the Ron Waxman award from the IEEE Design Automation Standards Committee (DASC) for extraordinary service to the DASC. A back injury kept me from attending the awards ceremony, but it did not keep me from recalling Larry’s seminal work. Larry was first chair of the 1076 (VHDL) Working [...]
Ada-C redux
In a recent post on the DeepChip website, Gary Smith states that Fortran and Ada are superior to C and its variants, but notes that “…unless there is a major revolt among Embedded Programmers we are stuck with C and SystemC”. I was very surprised to read this (and surprised at Fortran’s cameo appearance), since [...]
The Deaths of Two Tech Giants
All of you undoubtedly noted the passing of Steve Jobs on October 5. What you might have missed is the passing of another high technology giant, viz., Dennis Ritchie a few days later. Ritchie was the father of the C language and one of the main forces behind the development of UNIX®. Indeed, the two [...]
OSCI-Accellera: Cue Mr. Peabody’s WABAC Machine
As most of you will have seen by now, Accellera and OSCI have announced their intention to form a new EDA standards organization that will cover the design flow roughly from Gate-level up through the System-level. This may seem to be a natural move to most people, and one that could easily have happened years [...]
DVCON & DATE 2011: A Rerospective
The last two months since my last post have been extremely busy for me—several weeks out of the office, and new responsibilities at work. In this post, I’d like to briefly look the two conferences, DVCon and DATE that I attended during this period. By now everyone knows that DVCon (held in early March in [...]
Reflections on UVM 1.0
As you may have already seen in the blogosphere and in the tweetdom, the Accellera Board today approved the release of UVM 1.0. This release is a major accomplishment from a technical standpoint, but it also represents a triumph of the collective will of the Electronics/EDA industry. If one flashes back to January 2008, the [...]