Going, Going, Almost Gone
There has been a trend over the past several years in the electronics community. It has been driven by the dismal economy...
Network ICs - packaging is a key design element
I recently had a chance to have a conversation with Judy Priest of Cisco about some of the design and packaging issues for...
Using EM to Design DGS Structures
A Defective Ground Structure (DGS) is an intentionally designed defect on a ground plan, which creates additional effective...
DATE 2010 Preview
The Design Automation and Test in Europe 2010 conference will be held in Dresden Germany from March 8 to 12. DATE...
DOT.ORG
POWER Architecture ISA 2.06’s Stride N Prefetch Engines Boost Application Performance
[ Published in issue of Chip Design Magazine ]60-GHz Communication: A Total Makeover
[ Published in October / November 2009 issue of Chip Design Magazine ]Accellera Technical Sub-Committee Enables VIP Interoperability and Reuse
[ Published in July / August 2009 issue of Chip Design Magazine ]Model OCP Interfaces in SystemC
Standards are being built on top of OSCI’s TLM-2 technology. [ Published in April / May 2009 issue of Chip Design Magazine ]Industry Standards Should Facilitate Multicore Adoption
[ Published in January / February 2009 issue of Chip Design Magazine ]GSA Mixed-Signal/RF Subcommittee Is Facilitating an Analog Ecosystem
[ Published in October / November 2008 issue of Chip Design Magazine ][Dot.org] The Second Commandment for Effective Standards
[ Published in April/May 2008 issue of Chip Design Magazine ][DOT.ORG] Margin Myopia Blurs Chip Supply-Chain Future
[ Published in March 2008 issue of Chip Design Magazine ][Dot.org] Debug Grows Increasingly Critical
[ Published in January/February 2008 issue of Chip Design Magazine ][ Dot.Org ] Kick-Starting RTL Power-Aware Verification
[ Published in October/November 2007 issue of Chip Design Magazine ][ Dot.Org ] The Unified Power Format -- A Standard Done the Right Way
[ Published in August/September 2007 issue of Chip Design Magazine ][ Dot.Org ] Integration and Power Highlight Latest Standards
[ Published in June/July 2007 issue of Chip Design Magazine ][ Dot.Org ] Power To The People
Power.org Grows with Major Players [ Published in April/May 2007 issue of Chip Design Magazine ][ Dot.Org ] EDA Standards: Have We Learned Our Lessons?
[ Published in February/March 2007 issue of Chip Design Magazine ][ Dot.Org ] In Search of the Holy Grail: Making Chips Cost Effective, Power Efficient, and Faster
[ Published in December 2006/January 2007 issue of Chip Design Magazine ]Time To Market Drives SoC Design To Higher Levels Of Abstraction
[ Published in October/November 2006 issue of Chip Design Magazine ]DOT.ORG: SystemVerilog: The Front Wave of Success
[ Published in June/July 2006 issue of Chip Design Magazine ]DOT.ORG: Introducing CEDA: An Organization for the CAD Community
[ Published in April/May 2006 issue of Chip Design Magazine ]DOT.ORG: Security: It's Not Just Encryption
[ Published in February/March 2006 issue of Chip Design Magazine ]It's Been A Busy Year for EDA and Semicon Organizations
[ Published in December 2005/January 2006 issue of Chip Design Magazine ]Aggregation Drives Successful IP Reuse
By helping IP providers and integrators assess IP quality, aggregators can ensure reusability while minimizing customer modification for different chips. [ Published in Aug / Sept 2005 issue of Chip Design Magazine ]SPIRIT: Structure for Packaging, Integrating, and Re-Using IP within Tool Flows
By looking to quickly produce usable IP-integration standards for SoC development, this organization has achieved many of its original goals. [ Published in April / May 2005 issue of Chip Design Magazine ]Si2: Innovation Through Collaboration
Flexibility is showing the organization a new way to help EDA and semiconductor companies address [ Published in December / January 2005 issue of Chip Design Magazine ]PCI-SIG: Several Years of Innovation
Both 2003 and 2004 are proving to be prolific years for the organization [ Published in October/November 2004 issue of Chip Design Magazine ]Dot.Org--The Metrics of Success
[ Published in July/July 2004 issue of Chip Design Magazine ]Dot.Org--Open Core Protocol: The SystemC Models
The System Level Design Working Group producestransactional models for the OCP 2.0 specification [ Published in April/May 2004 issue of Chip Design Magazine ]Dot.Org--Addressing the IP Quality Problem
FSA and VSIA link hands to tackle the issue [ Published in February/March 2004 issue of Chip Design Magazine ]Dot.Org--A Fresh Look at the New Si2
Working to generate standards that add value to the industry. [ Published in December/January 2004 issue of Chip Design Magazine ]
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