Expert Shootout: Parasitic Extraction
Last of three parts: What happens after 22nm, the impact of 3D IC designs, FinFETs, stress, and thermal issues.
"..." - Rodrigo Gonzalez

Making Semiconductor Architectures More Efficient
Last of three parts: What happens after 22nm, the impact of 3D IC designs, FinFETs, stress, and thermal issues.
Why advanced nodes are making parasitic extraction more difficult and forcing changes in design flows; flaunting the laws of physics.
Low-power designs can create false failures with existing test approaches, unnecessarily lowering yields.
Exclusive Research: Design starts expected to rebound to historic levels with major focus on power savings.
Just when you thought you had a handle on power management, interfacing with power management gets even more complex.
Low-power communications now being added inside of home-area network products; power becomes consideration at all times.
What goes wrong and what you need to know to get a head start on the next round of complexity.
Shrinking geometries force changes; new approaches rampant at CES
Power-aware designs becoming more necessary; companies begin integrating tools as area, power, performance tradeoffs become more complex.
3D is now possible, but ensuring its success will demand renewed focus on compute power and energy efficiency.
Actel changes the rules; Mentor up, recovery underway; Synopsys boosts simulation capabilities; Taiwanese earthquake impact, Marvell’s marvel, Intel’s dual-core Atom.
Research pushes deeper into more efficient chips; Synopsys’ adds software capabilities; Broadcom ups the ante in smart phones.
The programming is the same as before, but at least it won’t cost as much to watch.
New products emphasize power consumption and battery life; performance still important, but not always the competitive edge.
EnergyStar ratings on servers drives new standards for conserving power in memory; chips to hit market starting in Q1
Faster time to market, lower-power devices and playing catch-up after a long recession.
Making life better: Paper batteries, universal voltage plugs and battery chargers with a pull cord.
Test and yield together; changes in the IP market; beefing up the indirect channel.
Mid-life crises, heat stroke, and the mother of all invention. Just an average week in the engineering world.
Low-power everywhere at advanced nodes; earnings improve; vendors stack up new wins.
First of three parts: Accuracy vs. speed, advanced device parasitics, counting attofarads, plotting contact capacitance.
Second of three parts: The effects of multicore designs, lowering the voltage and workarounds; smarter techniques needed.
Last of three parts: What happens after 22nm, the impact of 3D IC designs, FinFETs, stress, and thermal issues.
First of three parts: Density and radiation; the effect of multiple power islands and complexity; more rules.
Second of three parts: The effects of new process nodes; end of life considerations, and special circumstances for breaking the rules.
Last of three parts: The effects of disaggregation, restrictive design rules and economic considerations.
First of three parts: Power becomes major factor at advanced nodes; questions surface about whether verification is reliable enough.
Second of three parts: Heated arguments over strategy, accuracy and effectiveness; problems rise as power islands are added in.
Last of three parts: The myriad effects of low power, the differences between OVM and VMM, and establishing good coverage models.
First of three parts: Difficulties are myriad at 28nm and 22nm, but at least power is part of the discussion with area, performance and manufacturability.
Four executives from Virage Logic, Actel, Forte and Magma sound off on the effects of Moore’s Law and what it means to semiconductors.
Power optimization and its effect on embedded and multicore software
What tools are available when you get to ultra-low power designs? Answer: Not many.
Wally Rhines, chairman and CEO of Mentor Graphics, talks about what’s changing in design, the effect of low power, and who’s going to be doing the most advanced designs.
Power budgets may look small, but the amount of power that can be saved with different design approaches will surprise you.
Every power-saving trick turns into more mileage, and less time with a plug in the wall.
Low-Power Engineering sat down with two of the top experts—Robert Hoogenstryd, director of marketing for design analysis and signoff at Synopsys, and Carey Robertson, Calibre product marketing director at Mentor Graphics—to talk about what changes at 28nm and 22nm and why parasitic extraction is becoming so important.