First of three parts: Context with power, performance and area tradeoffs; who’s responsible when something doesn’t work; characterizing IP; fear of getting things wrong.

Second of three parts: Changing dynamics of working with customers; risk vs. modification; context; blocks vs. subsystems; consolidation and the role of small IP developers; defining IP quality.

Last of three parts: Managing risk with a disaggregated supply chain; why and where the IP stack is growing; the changing economics of stacked die; thermal, power and economic context.

First of three parts: Functional vs. physical verification; power boosts design complexity; explosion in power domains; creating a good test plan; how to know when it’s done; the impact of IP.

Second of three parts: The impact of IP on power verification; finding the right abstraction level for the right portion of verification; more checks to do; technological limitations on speed.

Last of three parts: What standards are needed; writing testbenches for power; making software more energy-efficient; breaking down silos between design and verification; restructuring design teams and creating new methodologies.

First of three parts: Understanding the differences between software and hardware; what the software engineer sees and can do about it; when to tackle the problem; what’s missing.

Second of three parts: Providing enough information to software teams; modeling realistic scenarios; optimizing subsystems; changing attitudes among software developers; real optimization from further down in the stack.

Last of three parts: What drains the battery; how software can impact system-level energy consumption; where to find the low-hanging fruit.

First of three parts: Redefining the system for power; power estimation vs. real measurements and optimization; accuracy vs. relative accuracy; the impact of increasing complexity on estimates.

A look at what’s missing from the ESL tool chain and why it’s important.

Why there will be more processor cores on future SoCs, more integration headaches, and more convergence with areas no one even considered in the past.

Context has emerged as one of the most important challenges in IP—everything from power to noise to advanced physics.

Power is an additional challenge at advanced process nodes and in stacked die. What can be done about it?

What do software engineering teams need to deliver more efficient software? It isn’t always about more time.

Battery life is now a competitive weapon in the mobile device market, but what really makes one phone last longer on a charge than another?

The benefits of looking at power much, much earlier in the design flow.

Intel’s Max Domeika talks about migration techniques for the embedded Atom processor.

A look at the future of EDA, IP, power, stacked die and the relentless pressure of Moore’s Law.

What can be done to cut the power for a reasonable cost, and how do you get there?