Eclypse Low Power Solution: Clock Tree Synthesis
With the predominance of mobile devices, the rising cost of energy, and an increasing sensitivity to green practices, low power consumption has become a major concern for design engineers. This free paper will outline some best practices for low power design and explain how IC Compiler, a key part of Synopsys’ Eclypse Low Power Solution, delivers low power clock tree synthesis (CTS) that concurrently achieves the lowest design power and the best possible performance and area.
To download this white paper, click here.
Tags: Synopsys