The Week In Review: June 5

By Ed Sperling

Intel will pay $884 million to buy Wind River, a move that will open all sorts of new doors for Intel’s new Atom processor in markets demanding much lower power. By writing software directly to cores, this could prove a huge gain for Intel—sort of like owning your own fab. But what else will the company have to buy as we head down to 22nm and beyond? 

 

Maybe the printed circuit board technology? They aren’t laughing about that at Mentor Graphics. The company continues to invest in its PADS 9.0 flow for board-level design, which increasingly is become part of the extended SoC design. If you can’t build it on the chip, you’d better account for it somewhere and figure out what the penalties are. 

 

China seems to be on a technology acquisition kick—and making major strides in chip design. Shanghai-based foundry SMIC is using Synopsys’ HSPICE Simulator for 45nm physical IP and standard-cell development, and the Chinese Academy of Sciences is using Cadence’s Incisive Xtreme III System for next-generation multicore processor validation. Put the two of these together and you have an interesting picture of what’s been going on behind the scenes during the downturn.

 

Synopsys unveiled the first DDR3 IP verified in silicon at 1.6Gbits per second. That’s the maximum data rate of the JEDEC DDR3 spec. Who needs muscle cars when you can rev up your phone? Do they have an application for that, too? Synopsys also introduced multi-corner, multi-mode capability for design closure in IC Compiler. Things are getting very complicated, indeed. You can’t even describe that upgrade without taking a breath.

 

And meeting our intrepid blogger Markus Levy’s complaints head-on, ARM announced support for the EEMBC CoreMark Benchmark. It’s always nice to have some metrics that work, and it doesn’t hurt that ARM has been on EEMBC’s board since 1997.

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