Low Power Not Always A Priority
By John Blyler
Believe it or not, low power is not always a driving concern in chip design, especially when it comes to prototyping portions of a System-on-Chip (SoC). That is the finding of a recent survey conducted by Chip Design magazine. The survey quantified a variety of trends in the use of FPGA-based ASIC and ASSP prototyping.
Here’s the question that was asked concerning prototyping priorities: What was the leading decision in selecting your prototyping system? Almost a third of the respondents cited “flexibility and expandability” as their primary concerns in selecting an FPGA-based prototyping system (see chart below). Also high on the list of concerns was the completeness of the solution, lowest cost and best throughput performance. But lower power was not a big concern to most prototypers.
Is this surprising? Not really. Most engineers use SoC prototyping in FPGAs to reduce the number of chip re-spins due to functional and verification problems. Indeed, that “low power” even made the list is somewhat surprising. Believe it or not.
Tags: FPGA, Low-Power Design, SoC