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Research Review November 12, 2013

SmartLoc System Improves GPS Accuracy and Increases Battery Life

Researchers at the Illinois Institute of Technology have developed a system that can not only improve the accuracy of smartphone GPS systems in large city settings, but also extend their battery life.  While GPS accuracy in highly congested areas averages about 40 meters, the new system claims accuracies of 20 meters or better.

The new system uses a phone’s inertial tracking systems, (accelerometer), and compass to glean more detailed information about the users location between GPS location updates.  In addition to tracking the movement of the phone, the system builds a database of geographic features near a given GPS location.  For example, as a car travels over a humped bridge, the phones accelerometer produces a recognizable pattern of slightly increased and then slightly decreased downward acceleration.  The system can use this pattern to pinpoint the phones location on a nearby bridge that fits the pattern.  All geographic information is currently provided by Google Maps via the 4G network.  These network accesses use significantly less power than GPS functionality increasing battery life.  Using the SmartLoc system, as its called, it may even be possible to turn off GPS circuitry for periods of time resulting in even greater battery efficiency.

Selling Verification Internally
Paul McLellan chronicled ARM’s Laurent Arditi’s efforts to promote the use of formal verification techniques.  The advice given by Arditi can be applied to selling any new technology in-house.  Arditi advises engineers first,  not to oversell a technology by promising benefits that the system simply can’t deliver, and second to record metrics on the gains and costs of the technology meticulously over each project where the new technology is utilized.  By keeping expectations rational and being able to objectively report results, engineers can more easily influence executive decision makers to participate in their own success.

Arditi was specifically working on propagating successful formal verification techniques with ARM and reports that the aspects of a design to focus formal verification on are:

  • embedded assertions/properties are primarily written for simulation and so can be used for formal at no extra cost
  • X-propagation is low hanging fruit since simulation has issues with it and formal can do it with very few hand-written properties
  • complex clocking schemes are hard to verify with simulation but formal has found many corner case bugs and a major bug on the Cortex-A12
  • use Jasper ProofKits
  • reduce the cost of simulation. correlate formal coverage with simulation coverage, don’t try and do stuff like X-propagation in simulation, remove a big effort from simulation/humans
  • use simulation tricks (like reducing FIFO depths, changing arbitration) to reduce formal proof times too”

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