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Magnetic RAM Meets the Power Basics

TMR Structure

By Hamilton Carter, Contributing Editor

As CMOS feature size continues to scale down, power challenges for the technology are scaling up.  Increased leakage currents, DRAM refresh rates and the increase in the density of devices, (a double-edged sword), are some of the main contributors to these issues.  The following is a brief backgrounder on a technology that has been in the works for almost forty years, the magnetic random access memory (MRAM), which could provide a piece of the puzzle necessary to continue to increased levels of CMOS integration.

MRAMs are dense integrated, non-volatile memory structures.  Their density can be greater than that of SRAM and in some implementations it may even approach DRAM levels.  Because they’re non-volatile, MRAMs in standby mode have no leakage current and no refresh current requirements.

The technology that enables MRAMs to be read, the tunneling magnetoresistance effect (TMR),  was first predicted in 1975 and then successfully demonstrated twenty years later in 1995.  An MRAM bit cell is built from a conceptually simple structure shown above, the magnetic tunnel junction, (MTJ).  The junction consists of a fixed magnet, the ‘fixed layer’, and a magnet whose orientation can be changed by the MRAM’s write circuitry, the ‘free layer’.  Due to the TMR effect, the resistance measured through the cell is significantly higher when the two magnetic layers point in opposite directions.  This difference in the resistance of the cell based on the orientation of its magnetic layers provides the bit information that can be read out.

The Down Side
The predominant technology used to write to MRAMs so far is a technique called spin torque transfer, STT.  Currents of electrons with a specific spin, (the inherent magnetic field of the electron), known as spin currents are used to flip the magnet field of the free layer.  While the current that has to be delivered has been reduced since the technology was first developed, the switching energies of STT cells are still about two orders of magnitude higher than the typical CMOS switching energy.  Obviously, this limits the opportunities for integration directly with CMOS circuits.

Physics to the Rescue
Research performed this year has has shed a light on the possibility of using electric fields rather than spin currents to write magnetic memory bits.  If this technology pans out, great strides could be in store for Magnetic RAMs in the future.

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