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Making Semiconductor Architectures More Efficient
What makes one smart phone last longer on a charge than another? The answer may surprise you. Low-Power Engineering talks with Cary Chin, director of technical marketing for low-power solutions at Synopsys, about what his months of research have shown.
By Ann Steffora Mutschler
The lithium-ion battery has the power to ruin someone’s day, especially when it dies and cannot be charged, not to mention occasional thermal runaways that literally cause explosions. For a technology that is about 30 years old, and approaching its limits, it is mind-boggling that the best brains on the planet haven’t come up with a technological superior alternative.
But alas, they have not—at least from a realistic cost perspective. While the world waits, electrical engineers and system architects are leveraging power management techniques in the design of chips to do everything they can to make their system as efficient as possible to gain a bit more battery life.
As such, the power management IC industry is healthy. Marijana Vukicevic, principal analyst for power management at IHS iSuppli, predicts the global market for power management semiconductors will reach $36.2 billion in revenue this year, 13.9% higher than $31.8 billion last year. However, she expects growth to slow this year to bring revenues back in line after tremendous growth last year.
This move toward more efficient battery-powered devices is driving continuing demand for power management ICs as consumers everywhere look for longer battery life in their mobile devices—with new design trends likely to emerge in power management ICs, Vukicevic said.
Growth in alternate energy markets, including solar, wind, the electrification of vehicles and the smart grid also will drive growth, along with a move toward greater integration in power ICs. Those suppliers with the technology to further integrate their chips will reap the greatest benefits in terms of revenue.
“There are trends that are pulling several power management ICs into one, which is understandable for some devices,” she said. “Then there are times when some of these functionalities are coming from power management ICs that had already been integrated because the OEMs are looking into having more flexibility or they really want to add a feature that no one else does.”
Understandably, for tablets and iPads, there is a lot of integration because space is restricted and form factor is an issue.
When it comes to techniques, there is always a different issue, she noted. “Whether it is the battery charging, whether people are trying to figure out the best way to charge the battery without damaging the battery because you have to keep the current flowing—there are different techniques that people are applying. Some of these techniques are IP-protected, some of them are not. You do have companies looking into that, of course, because it is a big issue.”
Discrete chip vs. embedded block
In designs today, power management is implemented as discrete devices in a system or as part of the SoC, with the exact breakdown difficult to nail down.
“We have seen both types that are on-chip power management functionality available. There’s a lot of off-chip. It depends if you have a single SoC system. Then the power management has to reside typically on the SoC itself. That would be one reason to put it on the chip,” said Krishna Balachandran, director of product marketing for low-power verification products at Synopsys.
The job of the system architect is challenging. First, before even deciding how to implement the power management, the architect has to determine how to proceed. “There are a plethora of techniques that are available and the architect has to figure out which ones he/she wants and how to partition the design into a number of power domains. So that’s an architectural problem. Even before that, the architects decide how much they want to control power at the system level vs. using software vs. the hardware chip level. That’s a tradeoff they make early on,” he said. “Usually, whatever they are not able to achieve from a system perspective and from a software control perspective, that’s when they start putting the onus on the chip design itself. The system architect goes through a process, figures this out, and then says to the chip design team, ‘You’ve got to deliver me this power for this particular chip.’”
Looking at the smart phone market, there is also a trend toward integration of power management. “There are still functionalities that are outside that one particular IC, but there is a trend of integration because otherwise they would end up with a bunch of different ICs that take up space. Major power functions are integrated with the supporting ones that are not,” Vukicevic said.
The design approach depends on the OEM. “Between OEMs, there is a differentiation on how they do things. For example, sometimes you’ll find an OEM who buys a digital baseband from Qualcomm, for example, and then they buy an analog baseband from Qualcomm, and either power is integrated in that analog baseband or Qualcomm supplies an IC with power management,” she noted.
On the other hand, some OEMs pick and choose how the power is going to be managed. And finally, there is a top layer where software manages power consumption within the device—a layer of firmware and software that is above the hardware, Once you plug in to all of the hardware inside, there is a layer of firmware and a layer of software that is closest to the user, where the user actually can influence power usage, Vukicevic said.
By Ann Steffora Mutschler
While mobile product trends can be reliably unpredictable, devices are definitely moving towards supporting more software-based browsers, plug-ins for browsers, and downloaded codecs to go to browsers. This results in coming up with a best guess for performance targets. Throw power tradeoffs into the mix and things really start to get interesting.
In terms of defining performance today, one of the first considerations is the usage of the device. Josefina Hobbs, technical solutions architect in the low-power solutions group at Synopsys, said a lot of the challenge is understanding what the users are going to do with these things. “Even tougher, developers have to make some guesses, so of course the better representation they have a real usage model is going to help get them there. What it really boils down to is how is this thing going to be used and how well can you guesstimate how it’s going to be used. The minute you are off on your guesstimate you’re going to be negatively impacting your battery life.”
In terms of CPU considerations, Bill Orner, director of platform engineering at MIPS Technologies explained, “You have to start at the top and work your way down. What features are required for the device? From the features you’ll determine things like operating system that are necessary to fill those features. How much functionality trade-off do you want to do between things that are soft implementations versus dedicated hardware? Take, for example, an iPod where people want to watch video on it. Do you put in dedicated video decode hardware or are you going to expect that the CPU has to do the decode of all the compressed video? That has a massively significant impact on the CPU requirements.”
Another consideration is the fact that to achieve the same level of performance, implementing in hardware is almost certainly an order of magnitude more efficient in terms of power and potentially system cost because software doesn’t have to be developed for that particular function, saidf MIPS engineering director Darren Jones. “The tradeoff is that when you put it in hardware it’s built exactly once and you can’t upgrade it in the field. But it’s almost certainly much more efficient to put it in hardware.”
Latency is tied very closely with performance in mobile devices. “Can I keep up with this video stream? That is one key thing. The other key thing is not just power, which is how quickly you use your energy but energy itself: energy efficiency. If it’s a battery-powered device it’s not really how much power you use, it’s how much energy you use to finish your computation function. This is why MIPS decided to go the route of multithreading first and then multiprocessing. Multithreading gives a much more efficient use of the existing hardware whereas with a multiprocessor approach, you are replicating efficient hardware,” Jones said.
For example, a processor runs really well as long as it’s getting instructions and data from its caches. But when it gets a cache miss, especially on a mobile device where cost is certainly a factor, the memory subsystem tends to be pretty slow. It could take 100 or 200 CPU cycles to get the data from memory. The whole time the CPU is sitting doing nothing it’s probably burning power so it’s not really doing nothing, but it’s not doing anything good. Multithreading allows the chip, as soon as it gets that cache miss to switch to a different software thread whose data is in the cache. That means that while it’s waiting for those hundred cycles it’s actually getting some real work done.
Challenges in defining performance
The tradeoff between power and performance is the biggest challenge, according to Eyal Bergman, director of product marketing for CEVA. “We see that the same vendors, especially in wireless devices, give pretty much the same power budget that they gave a few years back and this is simply because battery technology has not progressed at the same pace that wireless technology has progressed and as applications have been developed. We need to put more functionality into a device that was originally designed to be powered by a battery. And we are using pretty much the same battery—maybe 10% or 20% better—but pretty much the same technology. And now we see that we need to do much more. It could be 10 times more when we talk about wireless communications.”
As power is directly related to voltage levels, moving to smaller manufacturing geometries helps here. He pointed out that the same chip is manufactured with today’s 40nm technology can be four times as fast as 10-year-old technology in terms of power.
Improving processor and overall system architecture is also a daunting challenge. “In the past, people used to run everything in CPUs or in other blocks. Now we see more optimized processors for communications, for multimedia and video, for graphics and when you move from a general processing unit to an optimized processor you can get a lot of power reduction because basically the processor is much more efficient for the target application. It can do more with less,” Bergman explained.
Companies that take this approach–MIPS, CEVA, ARM, among others—can offer flexibility in terms of having the ability to do a lot of things with software, although it is for a specific type of application. You cannot do video decoding for the wireless processor but you can do multi-standard communications processing very efficiently.
As such, system architects have a bigger challenge than ever. “When we talk with the system integrators that they want interfaces to the processors. What you have on the system is the power management unit that is becoming more complex than you want. To have interfaces to the system level gives you flexibility to shut down processors. For instance, you want to be able to lower the speed and the voltage of the processor per use case in order to decide which parts of the system need to be activated and which need to be deactivated. And all of these interfaces need to be defined very closely with the architecture in the early stages because once you integrate at the top and don’t have the interfaces you will limit the flexibility later on,” he said.
Paradigm shift in mobile
Given the dynamic nature of the mobile device market, Jones observed a paradigm shift occurring. “A few years ago when you got a phone it had a phone on it and maybe voicemail. Now the phone part is one-third or less of the functions and maybe holds less value because consumers desire to get iPads and smart phones. It used to be that the system designer would put as much functionality in [the device] as possible and it would take up all the power of the available CPU. Now we can give them more powerful CPUs, but the problem is if they used it their battery would last 15 minutes and that’s totally unacceptable–nobody is going to buy the iPhone if the battery only lasts 15 minutes.”
He noted that system designers such as Samsung and Apple now have to think of what feature set can be delivered with a certain battery size and energy budget. “So they are challenging us to give them the energy efficiency with good performance (meaning megahertz and delivered numbers of instruction), but they don’t want the bleeding edge because then they’ve got the 15-minute battery problem. They want something that’s good performance, but energy efficiency is actually the most important thing—more so than performance.”
By Ed Sperling
Chip companies that have been betting the future on better battery technology and holding off on the often painful process of reducing voltage should probably start rethinking their plans.
Battery technology is not expected to improve by more than 3% per year, and even that may slow. Compared with the chip side, there are no breakthrough materials such as halfnium or technologies like high-k/metal gate or air gap to enable design engineers to hit the reset button. In batteries, those minimal gains already are coming from advanced materials applied to the anode (-) and cathode (+) of the batteries, as well as significantly higher density for holding more charge in the same space.
The basic variables in a battery haven’t changed, though. It’s still a balance between capacity, cycle life and safety. Add too much capacity and weight becomes a factor. Use cheap materials and the batteries hold less charge over time. Increase the density too much and the batteries pose a fire risk.
New Materials
At the center of most batteries—at least the ones in common use—are the anode and cathode and an electrolyte solution. Typically the electrons move from a negatively charged anode to the positively charged cathode, and the electrolyte is used to store the electrons and prevent them from flowing freely. When the battery is recharged, the flow is reversed. (There are exceptions, such as electrolytic cells where the cathode is actually negative, but use of that technology is far more limited.)
By adding a ceramic layer on the anode, Samsung has been able to lower the resistance with a smoother surface while also improving safety. It also has doped the cathode with aluminum and other materials to prevent leakage. All of this comes at a price, though, and battery makers are keenly aware of how much the market will bear.
“We found that 33% of consumers are willing to pay $45 for an extra hour of battery life,” said Sean Lee, head of Samsung marketing and business development in the United States. “A 2.8 amps/hour battery produces 10.5 watt hours. A 3.0 amps/hour battery produces 11.2 watt hours. The higher capacity has allowed up to 11 hours of battery life for a netbook and 10 hours for a notebook, but actual time varies significantly depending upon applications being used.”
Samsung also is working on a high-density graphite anode and a higher-voltage electrolyte to reduce the amount of gas inside a battery. Lee said the company expects to shift to a silicon anode system in Q3 of next year, which will increase energy efficiency by up to 30%. It expects to reach 3.4 amps/hour by 2012 using that approach. But all of that won’t show up in longer battery life. By lowering the voltage slightly, cycle life—the overall number of times a battery can be charged—can be increased to 1,000 charges.
Panasonic is making similar tradeoffs with weight, according to Atsuo Yoneda, one of the company’s lithium-ion development engineers. Rather than increasing battery life, the focus in many applications is to reduce the weight by decreasing the number of batteries and making sure they hold their charge longer. The company is looking at a 3.6 amp/hour battery using a cathode made of lithium-cobalt-aluminum oxide, or NNP.
Shapes and materials
No matter what shape the batteries are in—either cylindrical or flat—the determining factor on battery life and the amount of power being stored is density and size. This is a basic area equation, and the shape of the battery doesn’t affect much.
Cost is another matter, entirely. Andy Keates, power sources enabling manager at Intel, said that prismatic cells are about 40% more expensive for the same capacity. One reason is the majority of those flat cells are custom sizes. They can enable the manufacturing of thinner notebook computers, for example, but they don’t change the battery life.
What’s more important, by far, is the material used in batteries, and there are a bunch. But the battery material expected to continue dominating the market is be lithium ion, which is the successor to lithium cobalt oxide, or LCO. As the chart below shows, there are a slew of technologies available. Lithium ion wins, however, on the basis of consistent power delivered over the longest period of time, versus a burst of power in the lithium iron phosphate.
Figure 1: While some exotic combinations have been developed and tested, none beats lithium ion for most portable electronics. (Source: Intel)
Other considerations for the future
One of the more interesting ramifications for battery technology is what happens when voltages drop inside of SoCs.
“Right now we’re seeing voltages as low as 2.5 volts,” said Keates. “It may go as low as 2 volts on the discharge curve, which leads to a tradeoff because voltage regulators may lose efficiency at less than two volts.”
That means that instead of just designing more power-efficient chips, now they have to include more power efficient regulators—and all of this because everyone was counting on batteries to improve enough so that battery life of devices could be extended. At this point in time, at least, it looks as if the faith in battery technology improvement was over-optimistic.
By Brian Fuller
The world has changed dramatically in the 209 years since Alessandro Volta hunched over his table by candlelight and figured out how to capture energy in his voltaic pile, the first electric battery. What has changed little, however, is the battery itself.
Since Volta’s conception, the battery has remained a cell with negative and positive electrodes, an electrolyte, and an ion conductor, all of which turns a chemical reaction into electricity. The chemistry that makes it happen has changed little.
Today the importance of batteries (estimated to be a $15 billion market in North America alone) on scales both large and small is more crucial than ever. System designers struggle with making portable equipment that runs longer on lighter batteries; others are grappling with how to power electric vehicles and maintain storage farms that are envisioned for solar and other renewable energy sources.
But battery improvement, unlike Moore’s Law, is measured in single-digital increments per year, not a doubling of capacity every 18 months. Chemistry, to abuse a phrase, is what it is. “The laws of physics and chemistry dictate what ultimate energy you can get in the battery system,” said Subra Iyer, principal technologist at Quantum Sphere, a Southern California startup using nano-materials to improve battery life and performance.
“There are things that make lithium ion technology almost fundamentally the best [the industry] can do,” said Robin Tichy, technical marketing manager at Micro Power Electronics Inc., Beaverton, Ore. “Look at periodic table of elements. Lithium is the lightest element that gives you highest energy at the lightest weight. There’s not a lot you can do from there. Everything else is going to be incremental.”
Battery research in the past two years has been nothing if not frenetic:
These represent hope, investment and incremental change. But incremental change, according to Tichy, “can enable an awful lot.” The industry today finds itself knee-deep not only in fundamental research, but more important in delivering improvements in and around the battery to squeeze the most out of existing chemistry. These range from nano-scale research in materials development to packaging and metering to power management at the system level, among other approaches.
At Micro-Power, which makes power supplies, battery packs and chargers, engineers are focusing on power-balancing techniques in the hopes that “something seemingly small can make a revolutionary change for a given application,” according to Tichy.
The commercialization of lithium-ion batteries in 1991 brought relatively light weight, cost-effective portability to important markets, including laptops, medical devices and power tools. But lithium ion batteries tend to have a spiky power profile compared with smoother charge-discharge rates of alkaline batteries, and that can be a problem for systems that require accurate battery-capacity measurements.
Micro-Power has implemented fuel gauging for lithium ion batteries that’s 99% correct if used right, Tichy said. The current state of the art, as we know from the IT department, is to drain your laptop battery occasionally to ensure an accurate fuel gauge. But new fuel-gauge technology for laptops self-calibrates opportunistically. This approach can deliver another 15 minutes of run time on a laptop. Assuming a two-hour battery life, that’s an improvement in operation of more than 10%.
The importance of an accurate gauge of battery life is crucial in medical applications. For example, life-support ventilators have had to use lead acid batteries to ensure smooth voltage decline for consistent operation. The design tradeoff is weight and bulk.
More surgical tools, especially in the field, are battery-powered. As Tichy says, anything that’s been mechanical and motorized in the past is entertaining the idea of power by Li-ion battery today, as opposed to heavier nickel-cadmium batteries.
Micro-power helps systems “monitor and understand exactly what the runtime to empty is,” Tichy said. “For life-support medical equipment for obvious reasons, the FDA regulations say you have to have an accurate countdown from 30 minutes.
Quantum Sphere is developing new nano catalysts, electrodes and process chemistries to try to double volumetric capacity over state of the art, according to its CEO, Kevin Maloney. The Santa Ana, Calif.-based company is focusing on two major components of battery performance: energy density and power density.
Quantum is attacking energy density issues as they impact system runtime by using different metals to improve the battery anode. Current Li-ion batteries use graphite for the anode, which limits the battery to 350mAh/gram. Quantum is using different amorphous metal alloys, including tin, magnesium and silicon, to pack more lithium into the anode to improve performance. Nanoscale materials have 2000% greater surface area with just 10% loading in the battery solution. This translates to commensurately higher reactivity, catalysis, energy density and power density.
“Anything that increases more lithium in the anode increases energy density,” Iyer said.
Power density is a way to measure the charge/discharge rate of lithium through the anode, cathode and electrolyte. The faster it gives up the lithium, the more high-power applications the battery can accommodate and the faster it can be recharged.
This is crucial to the development of electric vehicles, especially enabling a quick recharge in a world in which consumers are used to three-minute fill-ups at the gas station.
For example, utilizing QuantumSphere’s nano-integrated gas diffusion electrode, a 320% increase in power density is achieved in metal-air battery systems. This enables enhanced functionality in both consumer and military applications, where higher power and longer lifetime is required.
At NEC, the focus is on making sure the energy stored in those batteries is not being wasted as it powers the system.
“Power management technology is a key enabler,” said Steve Kawamoto, director of marketing for custom SOC solutions at NEC Electronics America in Santa Clara, Calif. For example, work is being done on radio technology to manage the burst-like nature of Internet data activity on a handset. “You’re powering up and down those [power] rails and that’s a very power-hungry aspect of the handset. So you want to power up and down as quickly as possible.”
Power-management techniques have gotten so sophisticated that they can manage power in between texting keystrokes, Kawamoto noted. If the power rails are on in between keystrokes, power is wasted.
“It’s about understanding the system context and what needs to be on in the rest of the system,” he said. “When the user is typing, I can power down other parts of the system, for example the graphics subsystems or other radios.”
Kawamoto notes that applications processor designers are doing “a lot of amazing things” to optimize their end of the battery bargain. “But all this innovation has to be fed back into the power management chip so that there is a device that enables that form factor. It’s important to enable that form factor. “
In a way, the world today is staring at the battery world, saying, in effect, “if only we could find the miracle chemistry” to power cars for 500 miles and enable days of constant use in a range of consumer devices. For now, that’s illusory. And consumers, in the end, are OK with it, whether they realize it consciously or not.
“There’s a threshold that people have,” said Kawamoto. “If they can find value in the device itself, they’ll put up with” battery limitations.
By Cheryl Ajluni
Today’s consumers continually demand ever more efficient and reliable means of mobile communication. At the same time, the wireless industry is evolving toward higher data rates and capacities. Both of these trends present a wealth of opportunity for innovative system engineers looking to design the next generation of mobile communication devices. They also pose some interesting challenges, not the least of which is power.
Mobile devices are today like miniature computers and, as such, a great deal of power is required to support the range of features and applications they now offer. This requirement will only increase with future generations of mobile devices. But consumers are demanding longer battery life to ensure that their mobile devices stay powered for as long as possible. Unfortunately, there are only so many ways that these issues can be addressed, including utilization of new technologies and techniques for reducing power consumption and replacing the battery altogether, just to name a few. Let’s take a closer look at these options and what they may mean for the future generation of mobile communication devices.
Understanding power consumption is the first step in learning to minimize it in a mobile device. In a digital circuit, power consumption can be classified as either dynamic or static. Dynamic power is due to the capacitances inherent in CMOS circuits as they are switched between low and high voltage values. Static power consumption is due to leakage current in the circuit’s transistors and is mostly determined by the size and number of transistors on a device.
To ensure acceptable battery life, system designers must pay careful attention to the power consumption in their designs. Various power management strategies and power-optimization techniques, spanning all levels of design abstraction, can help the engineer achieve sufficiently low power consumption. Dynamic power consumption, for example, can be minimized at the layout or gate level by reducing wire capacitance and restructuring logic to minimize switching activity. Leakage power can also be minimized at the gate level using multi-threshold standard cells. By far though, the greatest reduction in power consumption, whether dynamic or static, comes from utilization of power-optimization techniques at the system level.
At the system level, static (e.g., leakage) and dynamic power both can be affected by employing a range of techniques. Which technique to use will often depend on the target application in question. Some of the basic techniques for minimizing power consumption include automatic clock gating and multi-threshold voltage libraries. More aggressive power savings come from advanced techniques like multiple supply voltage and power shutoff. A multiple supply voltage technique is useful in designs where everything is always running at full speed. In contrast, power shutoff is used in designs where large portions of the device are not always active, such as in a handset. Dynamic frequency involved scaling is another technique whereby the design is dynamically adjusted to meet only the requirements that exist at any given time. At the system level, where CPU and memory are dominant power-consuming subsystems, memory hierarchy and dynamic voltage and frequency scaling technique (DVFS) are considered the most optimal power-saving techniques. Other techniques to consider include:
Gating Techniques: Clock gating, whether combinational or sequential, is just one gating technique that can be used to minimize power consumption in a design. Power and data gating are two other alternatives. Power gating is similar to clock gating in that cells that do not perform a required computation are turned off using sleep transistors. Instead of disabling just the clock signal, sleep transistors also disconnect cells from their power supply. As a result, power gating reduces both dynamic and static power consumption. Data gating, is a technique whereby data inputs of functional units are gated depending on whether output values are used.
ESL Power Analysis: While employing specific power-saving techniques can be effective, another alternative utilizes specially designed EDA software at the Electronic System Level (ESL) to reduce power consumption. With this software, system engineers can anticipate the system’s power consumption early in the design flow and then quickly explore the impact of different design alternatives (e.g., different bus topologies or IP blocks) on that expected power consumption. The engineer also can make decisions regarding which power management strategies to implement and then verify whether or not these strategies will allow power targets to be met. Most of the major EDA vendors and a number of startups have developed low-power synthesis tools to analyze power consumption at the system level using activity data, which can save significantly more power than RTL done by hand. By letting system engineers synthesize power-efficient RTL architectures from the ESL, significant power optimization can be achieved.
Process Techniques: While traditional power management techniques like low-power modes, clock gating and DVFS will continue to be useful, new process techniques can also be used to solve low-power design challenges. One grouping of techniques comes from Texas Instruments and is available in the company’s second-generation SmartReflex power and performance management technologies. SmartReflex will be integrated into both custom and standard devices at the 90-, 65-, 45-nm process nodes and below. Comprised of intelligent and adaptive hardware and software techniques, SmartReflex 2 dynamically controls voltage, frequency and power based on device activity, modes of operation and temperature. These techniques feature a number of innovations such as adaptive voltage scaling, dynamic power switching and standby leakage management, and accomplish a variety of goals including reducing static leakage power at the silicon IP level; coordinating the power consumption and performance of all major system components, and enabling a granular approach to partitioning a device’s power domains.
While power-saving techniques can be effective in minimizing power consumption in battery-operated mobile devices, what if there was a way to eliminate batteries altogether? The key to this vision lies in being able to transmit power to, for example, a laptop or cell phone, as easily as we now transmit information via wireless power technology.
Recently, Intel joined forces with physicists from Massachusetts Institute of Technology to explore the resonant induction phenomenon (e.g., using resonant magnetic fields to wirelessly transmit electricity) which makes wireless power safely possible. The result of that exploration, Intel’s Wireless Resonant Energy Link (WREL), was demonstrated at the Intel Developer Forum in August. During the demonstration, a WREL unit transferred 60 watts over two feet with 75 percent efficiency (Figure 3). While initially, WREL will be used to charge batteries in laptops, cameras and cell phones when they get within several feet of a transmit resonator, Intel hopes its technology will eventually eliminate the use of batteries altogether.
At the August, 2008 Intel Developer Forum, WREL was used to wireless power a 60-watt light bulb which consumes more power than an average laptop computer. The demonstration involved two metal arrays connected to a power amplifer. The arrays resonated at a certain frequency to establish an energy link, transmitting power from one array to the other.
Of course Intel is not the only company investigating ways to deliver wireless power to today’s increasingly wireless world. Fulton Innovation (www.ecoupled.com), Powercast (www.powercastco.com), WildCharge (www.wildcharge.com), and WiPower (www.wipower.com) have already shown simpler versions of wireless power technology.
Due to high frequencies and submicron feature sizes, predicting and managing the power consumption in next-generation SoCs remains a major challenge. Power, therefore, will continue to be a driving requirement in mobile device development. While current techniques are focused on minimizing power consumption, wireless power may one day make those efforts somewhat irrelevant. In the meantime, as long as system engineers design innovative new communication features and applications, ways to efficiently and cost-effectively power them for longer and longer lengths of time will be one requirement that never goes away.