Posts Tagged ‘graphene’

Power Bits: April 10

Tuesday, April 10th, 2012

By Ed Sperling
A team of Stanford researchers has figured out a way to add piezoelectric characteristics to graphene, releasing electricity when the one-atom-thick lattice of carbon atoms is bent, squeezed or twisted.

Graphene is not piezoelectric by nature. But that changes when it’s doped with lithium, hydrogen, potassium and fluorine breaks down graphene’s symmetry, producing a piezoelectric effect that is comparable to three-dimensional materials. The researchers are calling their approach “straintronics,” because the electrical field strains the carbon lattice and causes it to change shape in predictable ways. They believe these techniques also can be applied to carbon nanotubes.

Applications of this technology are still unknown, but suggestions range from touchscreens to transistors.

Lithium atoms on a graphene lattice produce electricity when squeezed. Source: Stanford University.

Power Bits: Advanced Research

Friday, January 27th, 2012

Graphene Magnets
Carbon atoms arranged in a sheet are an interesting concept, but what can you actually do with them?

The answer is apparently more than we thought. Researchers at the University of Manchester in the U.K. have given graphene magnetic properties by removing some atoms and replacing others with non-magnetic atoms. The result is a double negative effect, which turns it into a magnet.

Try throwing this on the fridge.

This is particularly interesting news for spintronics, which is a subject of much research for low-power computing over the next decade. And in case you were wondering, these magnetic graphene sheets will stick to your refrigerator.

More Efficient Driving Routes
Nothing wastes energy like idling in traffic. It even wastes energy in people, who get frustrated and sometimes blow an internal circuit.

The University of Cambridge in the U.K. has developed a Transport Information Monitoring Environment project, aka TIME, which uses real-time road data to evaluate congestion. Unlike previous efforts in this area to collect data from cell phones, the U.K. effort relies on infrared detectors mounted on lamp posts to count traffic in each direction, as well as at intersections controlled by traffic lights.

This kind of technology is particularly useful for transportation planners. By scheduling traffic and alerting people of the best times to travel, it can significantly reduce commute times and save fuel.

Better Solar Panels
Researchers at MIT are looking at a couple of new ways to make solar panels more efficient. One is quantum-dot-based PV cells. There has been plenty written on quantum dots since they were first discovered in the early 1980s by a Russian physicist. According to Wikipedia, quantum dots are ICs are semiconductors whose characteristics are closely related to crystals.

A second approach being used by MIT is to stack solar panels to smooth out variability over the course of a day. The school is trying this out on its own rooftop.

–Ed Sperling

Power Bits: Spin Doctors And Extreme Low Voltage

Thursday, October 6th, 2011

By Ed Sperling
Researchers at the University of California Riverside are developing a new device that will use the spin of electrons plus magnets to store data.

Spin transport electronics, aka spintronics, has been discussed as a possible future direction since it was first discovered in the 1980s. The approach is to replace the traditional gate with a “magnetologic” version, which uses graphene and magnets, and ultimately to slash the amount of power required to compute.

The idea is that data will be stored in the magnetic state of the electrodes, and will move through the graphene and use its spin state to do the actual computing.

While this type of work has been theorized for several years, the big question is whether it can be done cost-effectively and with similar performance levels. Price/performance is a critical measure, and history is littered with these kinds of attempts to improve on what has been perfected in bulk CMOS and even SOI.

One of the more interesting developments based on more conventional technology comes out of a combined effort by STMicroelectronics and MIT’s Microsystems Technology Laboratories. The two groups have created a voltage-scalable SoC at 65nm that they say combines peak performance with “extreme” energy efficiency.

The challenge for mobile devices is to be able to rapidly ramp up performance and power down more quickly and much further—basically into the deep sleep state. The two groups claim the new chip can run at 0.54 volts, with the SRAM operating at 0.4 volts. The chip also has on-chip low-power clock generation and A-to-D conversion, as well as low-power peripherals.

The groups introduced the new chip at the European Solid State Circuits Conference in Helsinki, Finland.

Grappling With Graphene

Thursday, March 11th, 2010

By Brian Fuller
Silicon CMOS is a tough act to follow. The workhorse building block for the world’s electronics has been delivering for system designers for a half century. Despite hand-wringing over its apparent scalability limits, it shows only vague signs of slowing down.

For nearly as many years, it seems, the next great material or alternative to silicon CMOS has popped into the industry’s consciousness promising to be the next big thing—next year. Gallium arsenide, for example, has been next year’s hit technology for four decades.

The latest “it” material, however, could actually deliver on its early hype, and in the process enable the industry not only to continue scaling but to drive deep into previously unexpected depths of low-power design. Graphene—the two-dimensional crystalline form of carbon—first emerged as a term in the late 1980s and gained traction in 2004 when researchers at the University of Manchester extracted graphene layers from graphite—basically using Scotch tape—and then placing on silicon dioxide on a silicon wafer.

This time it’s different (maybe)
The material exhibited fantastic characteristics, including high electron mobility compared to silicon, twice the storage capacity of ultracapacitors, and it was rugged to boot. What’s more, its characteristics apparently remain stable down to the molecular level, unlike other materials used in semiconductor design. The graphene promise is such that in just the past three years, research papers are being written on graphene at the rate of one a day.

“There are two features that make graphene exceptional,” Kirill Bolotin, assistant professor in the Vanderbilt Department of Physics and Astronomy, said in a recent interview. “First, its molecular structure is so resistant to defects that researchers have had to hand-make them to study what effects they have. Second, the electrons that carry electrical charge travel much faster and generally behave as if they have far less mass than they do in ordinary metals or superconductors.”

Where some see glowing walls made of graphene circuitry and other exotic applications, people like James Meindl see an answer to scaling. Keynoting at the recent ISSCC (International Solid State Circuits Conference) in San Francisco, Meindl, director of the Joseph M. Pettit Microelectronics Research Center at the Georgia Institute of Technology in Atlanta, said: ”We will continue to scale vigorously for the next 15 years. Beyond silicon microchip technology, revolutionary developments in nanoelectronics, perhaps centering on graphene, may evolve.”

That’s music to the ears of many who, despite CMOS’s dogged determination, seeing scaling hitting a wall in the next decade.

“Look at Intel’s roadmap. They’re looking at 4nm in 2022,” said Michael Keating, a Synopsys Fellow. “As long as they’re charging down that road, graphene’s going to be a second-class citizen. But my guess is 2022 is not realistic for 4nm. Silicon will be seriously in trouble in that decade.”

“The reason graphene’s interesting is so much progress has been made in such a short time frame,” he added.

What’s all the fuss?
Graphene—a one-atom-thick planar sheet of sp2-bonded carbon atoms that resembles chicken wire—has a lot going for it.

Meindl, speaking at ISSCC, gave a half-dozen reasons graphene is going to win in the marketplace, including:

• No other known material has a higher mechanical strength-to-weight ratio.
• Carrier mobility exceeds 200,000-cm2/Vs.
• The capacity to conduct current densities as large as one thousand times greater than copper without electromigration.
• Graphene can serve as a source, channel drain regions of a field effect transistor (FET) and as an interconnect.

In addition to all the big talk, there’s been action.
• Fujitsu Laboratories Ltd. has developed a method to form graphene transistors directly on the entire surface of large-scale insulating substrates at low temperatures while employing popular chemical-vapor deposition (CVD) techniques.
• IBM in 2007 fabbed graphene field-effect transistors (FETs) using a single layer of carbon atoms atop a silicon wafer at its T.J. Watson Research Center at Yorktown Heights, N.Y.
• In February, IBM built, on 2-inch wafers, RF graphene transistors running at 100-GHz and operating at room temperature.
• At around the same time, Penn State researchers announced they have developed a way to fabricate graphene sheets on 4-inch wafers.
• Last year, Bolotin, working with colleagues at Columbia University, managed to get graphene to exhibit the fractional quantum Hall effect, where the electrons create new particles with electrical charges that are a fraction that of individual electrons, according to work published in the journal Nature.
• A venture-backed Austin, Texas, company, Graphene Energy, is working to commercialize graphine for energy storage.
• Javad Rafiee, a doctoral student at Rensselaer Polytechnic Institute developed a method of ultra-efficient hydrogen storage based on graphene. His approach stores hydrogen with 14 percent efficiency, better than any other material attempted to date.

What’s the catch?
There’s always a catch. While graphene is easier to manufacture than its cousin, the carbon nanotube, it’s no slam dunk yet. To date, there hasn’t been a simple way to create the p- and n-type devices required for CMOS transistors. But Georgia Tech recently reported it has used an electron beam doping process that simplifies the transistor manufacture.

In addition, graphene has no band gap so there’s no way to turn them “off.” But even that hurdle is being brought down. Researchers at Lawrence Berkeley National Lab last year engineered a controllable band gap in bilayer graphene—at room temperature.

When will we know when graphene gets the “next-year’s technology” monkey off its back for good?

Maybe relatively soon, suggested Synopsys’ Keating.
“CMOS has had an incredible run. It’s foolish to bet against CMOS. (But) graphene every year makes significant progress. It’s absolutely the promising thing right now. We’re a decade away.”