By Ed Sperling
Andes Technology, a Taiwanese maker of SoCs and processor IP, adopted Cadence’s digital front-end low-power design flow, which is based on the Common Power Format. Score one for CPF.

Toshiba Information Systems expanded its adoption and deployment of Mentor’s Catapult C for high-level synthesis. What’s interesting about this deal is Toshiba’s shift to untimed C++ and System C from an RTL-based design, which the company says is unproductive.

Synopsys completed its acquisition of Virage Logic, greatly expanding Synopsys’ IP portfolio from standard interfaces to everything from memory to processor cores and logic libraries.

GlobalFoundries held its first conference, which was largely a coming-out party for the combined company that includes pieces from AMD and Chartered Semiconductor. There were several themes of note. First, GlobalFoundries is gate-first high k/metal gate, while TSMC and Intel use gate last. For most customers, that means it becomes even harder to move from one foundry to another. Second, GlobalFoundries sees this as a strong ecosystem play. It has lined up ARM—which is playing across both foundries—as well as Freescale for its 90nm flash memory.
And finally, the company introduced a 28nm analog-mixed signal flow development kit.

In the memory space, memory resistors, aka memristors, are gaining attention. The technology is considered faster than flash while also drawing low power. Solid state memory already lowers the amount of power being used because there are no moving parts, but memristor reportedly uses as little as one tenth the power of flash. HP is teaming up with Hynix to develop what it calls ReRAM, which should put a big dent into the DRAM market.

By Ed Sperling

Business seems to be picking up everywhere in the design world, with an emphasis on speed—quicker deals, faster product rollouts and overall time to market—and all of it with an underlying emphasis on low power and tighter power budgets. Could it be that after the recession, everyone is trying to get back on track quickly?

Virage Logic completed the acquisition of NXP’s IP technology and its development team. That comes on the heels of its recent acquisition of ARC. The fact that Virage completed both of these acquisitions in a 12-day period is nothing short of an accounting miracle. And just in case the company didn’t have enough to do, it added a Silicon Browser for post-silicon bring-up and system debug.

Android seems to be getting its share of attention these days. Mentor Graphics introduced an Android Development System for Texas Instrument’s OMAP35x processors. TI’s processors also include ARM Cortex-A8 technology, which puts ARM squarely in the center of this effort, as well, with a heavy push toward better battery life. But will any of this take a bite out of the Apple iPhone?

On the get-things-done-quicker side, Digital Imaging Systems used Synopsys’ Galaxy Custom Designer to achieve first-pass silicon in 22 days. Not all of it was from scratch, of course, but that’s still a very tight timetable.

And Atrenta’s deal with Fujitsu’s Kyushu Network Technologies is aimed at reducing design risks in integration of third-party IP from multiple vendors with different clock domains. Translation: Faster time to market.

Also on the business side, Cadence expanded its design alliance with Toshiba for the consumer and mobile markets.

Intel invested millions of Euros in an Exascale Computing Research in France, as part of Intel Labs Europe. This is the second time in two weeks that Intel has paid out big bucks to appease antitrust regulators. This deal will add 900 new research jobs in Europe. That follows Intel’s settlement with AMD, clearing the way for Intel to go after ARM with its Atom chip.

ARM’s comeback was largely a reiteration of the strength of its ecosystem. It struck up a strategic architectural license agreement with Infineon for advanced security applications and created a solutions center for Android.

By Ed Sperling

Pushing down to future nodes on the Moore’s Law road map appears to be well beyond the reach of any single company except Intel these days.

Entire ecosystems now revolve around foundries. TSMC has its loyal band of IP vendors and tools companies. And even Intel, which has been on a buying spree of late rather than transitioning to an ecosystem approach, is working closely with TSMC on developing processes and IP for its Atom chip.

The other major hub, the Common Platform trio of IBM, Samsung and Chartered Semiconductor, has an even larger group of participants. In fact, NEC and Toshiba just extended their relationship with IBM to develop 28nm high k/metal gate technology for consumer products.

All of this speaks to the incredible complexity and skyrocketing cost of developing chips beyond 45nm. What’s different, though, is the emphasis on low power as one of the focal points of all development.

Toshio Mii, director of alliances at IBM, said the reason is that the race for higher performance is now tied directly to low power. Both encounter the same issues of insulation thickness and heat.

“To get the performance we need at 32nm and 28nm, we needed to solve the power problem,” said Mii. “Do we use polysilicon oxynitride or high k/metal gate? Our insulator thickness is so thin that we had current leaking through.”

There are still some tricks left in solving this problem. IBM still has its Air Gap insulation technology, which it likely will roll out at 22nm or the node after that. There also are restrictive design rules to overcome the need for double patterning until extreme ultraviolet lithography or electron-beam lithography are ready. And all the companies in the ecosystem are experimenting with new materials that can be used for insulation between wires.