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	<title>Comments for Low-Power Engineering Community</title>
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	<link>http://chipdesignmag.com/lpd</link>
	<description>Making Semiconductor Architectures More Efficient</description>
	<lastBuildDate>Fri, 16 Dec 2011 22:58:26 +0000</lastBuildDate>
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		<title>Comment on Experts At The Table: Managing Power At Higher Levels Of Abstraction by Grant Martin</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/11/18/experts-at-the-table-managing-power-at-higher-levels-of-abstraction-3/comment-page-1/#comment-10881</link>
		<dc:creator>Grant Martin</dc:creator>
		<pubDate>Fri, 16 Dec 2011 22:58:26 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3548#comment-10881</guid>
		<description>Yes, Chipvision had an interesting system of just that type.  I talked to them about it at the time, because we have an energy model (Xenergy) that can produce a stream of energy data for a Tensilica processor core, (the plug) that could be fed into a bookkeeping tool such as ChipVision&#039;s (the socket).  I wished they had survived, because if they had been successful with their tools, it may have prompted the rest of the industry to move to a standard socket.   OSCI has never picked up on this idea, but now that they have merged with Accellera, maybe there will be some such activity in the future.</description>
		<content:encoded><![CDATA[<p>Yes, Chipvision had an interesting system of just that type.  I talked to them about it at the time, because we have an energy model (Xenergy) that can produce a stream of energy data for a Tensilica processor core, (the plug) that could be fed into a bookkeeping tool such as ChipVision&#8217;s (the socket).  I wished they had survived, because if they had been successful with their tools, it may have prompted the rest of the industry to move to a standard socket.   OSCI has never picked up on this idea, but now that they have merged with Accellera, maybe there will be some such activity in the future.</p>
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		<title>Comment on Comparing Smart Phones by Mike Bradley</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/12/15/comparing-smart-phones/comment-page-1/#comment-10873</link>
		<dc:creator>Mike Bradley</dc:creator>
		<pubDate>Fri, 16 Dec 2011 19:27:12 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3613#comment-10873</guid>
		<description>I feel as though the discussion just started...  Is there a follow on?</description>
		<content:encoded><![CDATA[<p>I feel as though the discussion just started&#8230;  Is there a follow on?</p>
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		<title>Comment on Why Batteries Don’t Last Long Enough by Sibyl</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/12/01/why-batteries-don%e2%80%99t-last-long-enough/comment-page-1/#comment-10105</link>
		<dc:creator>Sibyl</dc:creator>
		<pubDate>Tue, 06 Dec 2011 13:26:10 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3562#comment-10105</guid>
		<description>A lot of high verse explaining away the more likely reason batteries don&#039;t last; they don&#039;t last because manufacturers have designed a way to decrease their lifespan, thereby increasing consumption of new batteries. You see it in ALL batteries, such as automobile batteries, not only batteries for electronics.</description>
		<content:encoded><![CDATA[<p>A lot of high verse explaining away the more likely reason batteries don&#8217;t last; they don&#8217;t last because manufacturers have designed a way to decrease their lifespan, thereby increasing consumption of new batteries. You see it in ALL batteries, such as automobile batteries, not only batteries for electronics.</p>
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		<title>Comment on Cell Phone Radiation: Taboo Topic, Interesting Science by Pauline</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/12/01/cell-phone-radiation-taboo-topic-interesting-science/comment-page-1/#comment-10001</link>
		<dc:creator>Pauline</dc:creator>
		<pubDate>Mon, 05 Dec 2011 03:29:26 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3565#comment-10001</guid>
		<description>Excellent article.  The precautionary principle employed by Building Biologists states that if in doubt, take precautions to minimise exposure.  If your phone rings whilst driving (your car is also a conductive cage), stop, get out and answer your phone outside.  Use the earphones and hands-free kit.  Bluetooth devices emit the safe radio frequency waves as the phone, so they&#039;re not recommended (they&#039;re doing the same thing to your brain).

All this and you get a break from driving and the opportunity to concentrate on your call.  :-)

Pauline Ferguson
Building Biologist, Queensland, Australia</description>
		<content:encoded><![CDATA[<p>Excellent article.  The precautionary principle employed by Building Biologists states that if in doubt, take precautions to minimise exposure.  If your phone rings whilst driving (your car is also a conductive cage), stop, get out and answer your phone outside.  Use the earphones and hands-free kit.  Bluetooth devices emit the safe radio frequency waves as the phone, so they&#8217;re not recommended (they&#8217;re doing the same thing to your brain).</p>
<p>All this and you get a break from driving and the opportunity to concentrate on your call.  <img src='http://chipdesignmag.com/lpd/wp-includes/images/smilies/icon_smile.gif' alt=':-)' class='wp-smiley' /> </p>
<p>Pauline Ferguson<br />
Building Biologist, Queensland, Australia</p>
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		<title>Comment on Experts At The Table: Managing Power At Higher Levels Of Abstraction by Anon</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/11/18/experts-at-the-table-managing-power-at-higher-levels-of-abstraction-3/comment-page-1/#comment-9555</link>
		<dc:creator>Anon</dc:creator>
		<pubDate>Mon, 28 Nov 2011 10:50:24 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3548#comment-9555</guid>
		<description>Chipvision had the exact high-level system bookkeeping tools that Grant Martin mentions. Unfortunately, that didn&#039;t help them stay in business ;(</description>
		<content:encoded><![CDATA[<p>Chipvision had the exact high-level system bookkeeping tools that Grant Martin mentions. Unfortunately, that didn&#8217;t help them stay in business ;(</p>
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		<title>Comment on Experts At The Table: Managing Power At Higher Levels Of Abstraction by Richard Gordon</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/11/11/experts-at-the-table-managing-power-at-higher-levels-of-abstraction-2/comment-page-1/#comment-8355</link>
		<dc:creator>Richard Gordon</dc:creator>
		<pubDate>Sat, 12 Nov 2011 02:45:09 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3538#comment-8355</guid>
		<description>Power closure is and has been the problem to solve for many years, now. Power optimization naturally incorporates timing and area optimization, so it subsumes timing closure. Computer hardware and software limitations have driven designers and EDA tools to optimize power at higher levels of abstraction. For the time being, voltage islands, power-off protocols, and gate-level optimizations have first-order salutary effects on power reduction. However, power is an equal opportunity problem. It affects chip design at all levels of abstraction. More watts have been saved from semiconductor materials and process innovations that have led to today’s reduced supply voltages than any other method. This low-hanging “fruit” has been picked, but there are many more to be had, such as replacing metal clock lines and repeaters with light guides or devising transistors with lower leakage currents. At the theoretical limit, computing requires de minimis power, as discovered by Charles Bennett and Rolf Landauer of IBM in the 1960s. Of course, there is always the readout, which will always consume power as computing results converted to human-usable form. But until such a time as we learn how to get circuits to compute with practically zero power, look for power savings in every nook and cranny, not just the attic of design.</description>
		<content:encoded><![CDATA[<p>Power closure is and has been the problem to solve for many years, now. Power optimization naturally incorporates timing and area optimization, so it subsumes timing closure. Computer hardware and software limitations have driven designers and EDA tools to optimize power at higher levels of abstraction. For the time being, voltage islands, power-off protocols, and gate-level optimizations have first-order salutary effects on power reduction. However, power is an equal opportunity problem. It affects chip design at all levels of abstraction. More watts have been saved from semiconductor materials and process innovations that have led to today’s reduced supply voltages than any other method. This low-hanging “fruit” has been picked, but there are many more to be had, such as replacing metal clock lines and repeaters with light guides or devising transistors with lower leakage currents. At the theoretical limit, computing requires de minimis power, as discovered by Charles Bennett and Rolf Landauer of IBM in the 1960s. Of course, there is always the readout, which will always consume power as computing results converted to human-usable form. But until such a time as we learn how to get circuits to compute with practically zero power, look for power savings in every nook and cranny, not just the attic of design.</p>
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		<title>Comment on Tesla’s Lost Lab Recalls Promise Of Wireless Power by Jane Alcorn</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/11/03/tesla%e2%80%99s-lost-lab-recalls-promise-of-wireless-power/comment-page-1/#comment-7633</link>
		<dc:creator>Jane Alcorn</dc:creator>
		<pubDate>Thu, 03 Nov 2011 18:14:39 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3492#comment-7633</guid>
		<description>Thanks for the article. A venue change correction: Tesla Conference 2011 will be held in Riverhead, NY, at the Hilton Garden Inn, NOT from Brookhaven National Laboratory.</description>
		<content:encoded><![CDATA[<p>Thanks for the article. A venue change correction: Tesla Conference 2011 will be held in Riverhead, NY, at the Hilton Garden Inn, NOT from Brookhaven National Laboratory.</p>
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		<title>Comment on Samsung, Micron Unveil 3D Stacked Memory And Logic by Russell Fish</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/10/06/samsung-micron-unveil-3d-stacked-memory-and-logic/comment-page-1/#comment-7454</link>
		<dc:creator>Russell Fish</dc:creator>
		<pubDate>Mon, 31 Oct 2011 21:59:31 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3393#comment-7454</guid>
		<description>There is a way easier and less expensive technique to reducing power.  Build CPUs directly on the DRAMs.

Russell Fish
Venray Technology</description>
		<content:encoded><![CDATA[<p>There is a way easier and less expensive technique to reducing power.  Build CPUs directly on the DRAMs.</p>
<p>Russell Fish<br />
Venray Technology</p>
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		<title>Comment on Limits For TSVs In 3D Stacks? by George Storm</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/09/08/limits-for-tsvs-in-3d-stacks/comment-page-1/#comment-6268</link>
		<dc:creator>George Storm</dc:creator>
		<pubDate>Sat, 24 Sep 2011 13:52:31 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3267#comment-6268</guid>
		<description>With existing technology, 3D stacking is best suited where heat dissipation is largely concentrated in a single die at the base of the stack.  Other arrangements do, as stated suffer from increased thermal resistance.
There could a range of options for improvement.  Pure-via interposers are an attractive solution in the medium term. However, provision of blind and semi-blind vias in the active dice would be more thermally effective than such interposers.   The problem is the effect of built-in strain - and will probably stay that way unless/until low-temperature via deposition can be developed.
Another potential approach may be the development of heat-pipes between the vias; it&#039;s quite likely the pipes could not be anywhere near optimal - but total dissipation capability might yet exceed present-day single dice by a substantial margin.</description>
		<content:encoded><![CDATA[<p>With existing technology, 3D stacking is best suited where heat dissipation is largely concentrated in a single die at the base of the stack.  Other arrangements do, as stated suffer from increased thermal resistance.<br />
There could a range of options for improvement.  Pure-via interposers are an attractive solution in the medium term. However, provision of blind and semi-blind vias in the active dice would be more thermally effective than such interposers.   The problem is the effect of built-in strain &#8211; and will probably stay that way unless/until low-temperature via deposition can be developed.<br />
Another potential approach may be the development of heat-pipes between the vias; it&#8217;s quite likely the pipes could not be anywhere near optimal &#8211; but total dissipation capability might yet exceed present-day single dice by a substantial margin.</p>
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		<title>Comment on Solar Designs Focus On Low Power by How solar panels work</title>
		<link>http://chipdesignmag.com/lpd/blog/2011/08/11/solar-designs-focus-on-low-power/comment-page-1/#comment-5493</link>
		<dc:creator>How solar panels work</dc:creator>
		<pubDate>Thu, 11 Aug 2011 12:05:21 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/lpd/?p=3152#comment-5493</guid>
		<description>There is something strange with the article. You noted that common panels generate 200W of power. While you have noted below that most systems are 3.3v or below. That is absolutely not true, especially not with home grid systems, where most installations requires 12V batteries or more. I&#039;ve talked about the differences between high quality silicone cells and new generation paper thin solar panles at http://how-solar-panels-work.com
Thanks for the article,
Nebojsa</description>
		<content:encoded><![CDATA[<p>There is something strange with the article. You noted that common panels generate 200W of power. While you have noted below that most systems are 3.3v or below. That is absolutely not true, especially not with home grid systems, where most installations requires 12V batteries or more. I&#8217;ve talked about the differences between high quality silicone cells and new generation paper thin solar panles at <a href="http://how-solar-panels-work.com" rel="nofollow">http://how-solar-panels-work.com</a><br />
Thanks for the article,<br />
Nebojsa</p>
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