Power Bits: Feb. 9
Saving heat but losing money; cheap solar; nano security
"Yes, Chipvision had an interesting system of just that type. I talked to them about it at the time, because we have an energy..." - Grant Martin

Making Semiconductor Architectures More Efficient
Saving heat but losing money; cheap solar; nano security
Documenting the value of electric trucks; wireless car chargers; lessons learned from snake movements.
Graphene magnets, more efficient highways and better solar panels
After decades of limited interaction teams of mechanical and electrical engineers are starting to work together. Results are surprising.
Complex system-level power analysis requires more than just a worst-case scenario. Planning for power needs to happen earlier in the design process.
Guard-banding makes integration easier and faster, but too much margin is a bad thing. Why it’s becoming difficult to keep it under control.
First of three parts: Functional vs. physical verification; power boosts design complexity; explosion in power domains; creating a good test plan; how to know when it’s done; the impact of IP.
Customizable processors leverage the best of power management; a variety of approaches combine energy efficiency without sacrificing performance.
While lowering the voltage isn’t much of a challenge in the digital world, it’s a new issue in analog; low-power digital cores become essential.
Power consumption is now considered a feature; it’s also something that is being used as a tradeoff for other features.
Integration of different operating systems across SoCs with a focus on power is forcing some unusual combinations—and lots of headaches.
Understanding total energy consumption puts a new emphasis on understanding the impact of the software used in a system. A single application can throw off everything.
Peripherals have always had the luxury of design without concern for power. As devices become more mobile that’s changing.
First of three parts: Understanding the differences between software and hardware; what the software engineer sees and can do about it; when to tackle the problem; what’s missing.
Second of three parts: Providing enough information to software teams; modeling realistic scenarios; optimizing subsystems; changing attitudes among software developers; real optimization from further down in the stack.
Last of three parts: What drains the battery; how software can impact system-level energy consumption; where to find the low-hanging fruit.
First of three parts: Redefining the system for power; power estimation vs. real measurements and optimization; accuracy vs. relative accuracy; the impact of increasing complexity on estimates.
Second of three parts: The challenge of user profiles; two-way communication in a hierarchical flow; power vs. energy; the uncertainties of software.
Last of three parts: What’s missing; optimization vs. analysis; challenges of mixing old IP with new IP; the increasing value of high-level synthesis for power estimation beyond 45nm.
First of three parts: Power displaces performance as top priority; iPhone vs. Android; cloud-based video; the advantages of stacked die; defining the next killer app.
Second of three parts: The impact of radios on power; thinking bigger and more holistically; making medical devices more mobile; new methodologies and tools.
Last of three parts: Wide I/O and FinFETs; changes in mixed-signal designs; one CPU vs. distributed cores; re-thinking optimal design; minimum voltages.
Second of two parts: EDA’s role at different nodes; why power is now important at older nodes; the impact of multiple foundries using mature processes.
Power is an additional challenge at advanced process nodes and in stacked die. What can be done about it?
What do software engineering teams need to deliver more efficient software? It isn’t always about more time.
Battery life is now a competitive weapon in the mobile device market, but what really makes one phone last longer on a charge than another?
The benefits of looking at power much, much earlier in the design flow.
Intel’s Max Domeika talks about migration techniques for the embedded Atom processor.
A look at the future of EDA, IP, power, stacked die and the relentless pressure of Moore’s Law.
What can be done to cut the power for a reasonable cost, and how do you get there?
New challenges grow at advanced geometries.
A look at the issues facing designers at 28nm, 22nm, and in 3D stacking.
Why this approach is suddenly becoming very necessary to SoC engineers.