Power may be a persistent issue for semiconductor design, but for many companies it’s still not part of the architectural decision.

This may seem rather odd, considering that at 65nm and below power is an issue in all chips, along with lithography, insulation, on-chip interfaces and packaging. In fact, power is a myriad of issues ranging from static and dynamic leakage to power islands, signal integrity and gate structures. Yet many architects still don’t see it as their issue.

That likely will change over the next couple of years, as the leading edge of design heads to 32nm (and/or 28nm). Power will become even more pressing than it has been, with power islands, timing and various sleep, wake, on and off modes rising to center stage into a design. Over the next two generations of chips, architects will have to consider everything from reducing margins to get better power optimization to new materials and structures. They’re going to have to plan up front for how chips can be verified, including low-power IP, and they’re going to need to understand whether a chip can be manufactured with sufficient yield to make it economically viable.

These are big changes on the architecture side. Add to that more functionality, more dictates from the people wearing suits about what functions need to be included and what gets priority, and cost analyses about which nodes are next and which ones may be skipped and the life of an architect begins getting significantly less independent than in the past.

For the better part of a decade we have witnessed convergence of functions on a chip, and for the past two decades we have seen some of that convergence within end-user devices. Beyond 45nm, there is so much space to use on a chip that more and more functions can be built into it. Intel already has begun adding graphics engines into its processors, and most cell phone makers expect GPS will be standard on smart phones within the next couple years.

Batteries will have to last long enough to make those additional functions useful, and they will have to work in accordance with priorities set by consumers and businesses. That means changes in software, changes in design, and all of it has to begin at the architecture level. It also means that the convergence that has occurred on the technology side will lead to convergence on the people side, where more and more people are involved at the architectural level rather than at the next stage down.

A word of advice to chip architects: Book the bigger conference room next time.

–Ed Sperling

No matter how much more efficiently semiconductors can function, the real gains will always be outside the chip. A smart microcontroller can make a motor work more intelligently and save enormous amounts of energy. Better software can make a device run orders of magnitude more efficiently.

A more efficient system on chip, meanwhile, with all its complexity and sophistication, may provide gains of 30% or 40%, which is why battery life doesn’t increase from 6 hours to 20 hours. Better insulation, with high-k dielectric insulation, and better gate structures may reduce static leakage, but these are still incremental gains rather than game-changing improvements.

For plug-in devices, the situation is no different. In fact, in many companies in the U.S. Northeast, the biggest limitation on buying new technology is the amount of power these companies are allotted from the power grid. There isn’t more power available because there’s no place to build new power plants. Density, it seems, applies to population as much as to transistors.

For chip architects and SoC engineers, who have solved some of the most complicated problems the planet has ever seen, the future will be in thinking outside the chip. The system is now software as well as hardware, and the application of that combined technology in the real world. Most of us still think in silos because the human brain is limited. But collectively, we now have access to much more information than ever before. Now the question is what to do with it.

For digital engineers, it’s bad enough to share a multicore SoC with analog functions. For analog engineers, it’s the same. Neither speaks the same language, and for the most part they weren’t even born in the same decade. Now add Mountain Dew-guzzling software engineers into the mix and the business folks at giant OEMs like Nokia and Samsung and Ford and the world looks even more bizarre.

But like it or not, surviving over the next decade may be just as convoluted as that. And the biggest rewards may go to those who can save the most power—or at least those who can understand the big picture and how all the pieces go together. It can start on the business side, or it can start down on the chip level. Or it can be part of the IP that adds intelligence into everything.

So what skills are you bringing to the table? And what do you think you need know and how will you get there?

–Ed Sperling

When engineers and system architects (and their marketing people) think about low-power designs, they are confronted with an overriding question about power: What are they trying to achieve in the design?

A.     Longer battery life.

B.     Lower power consumption for the same performance with more functions and equivalent battery life.

C.     More performance for the same power consumption.

D.    Lower cost for equivalent metrics.

All of these answers are valid, depending upon the purpose of the effort. In a new smart phone or military device, the selling point may be longer battery life. In a that is being used for graphics rendering, what makes it valuable is faster performance. And in a device aimed at developing markets where price is extremely important, cutting every nickel out of the final cost may be the most valuable.

Missing from this equation, though, are the other pieces of the final product. While the functional goals of a device need to be established up front—increasingly they’re dictated by the marketing department—things like software prototyping, packaging and manufacturability are several steps down the line. Nothing can be designed sequentially anymore, and by the time we arrive at 22nm we likely will be facing restrictive design rules from the manufacturing process, software scaling issues for multicore designs, and a whole bunch of techniques to both improve insulation, go vertical on chip packaging and new ways to get the static leakage heat out of the chips.

All of this will affect how much power chips use, how much performance they can provide and what the total cost will be. At each process node, these other pieces will begin to have more impact on the basic four questions involving power and cost. In the end, economics will win. The challenge for engineers will be to figure out how to keep the cost down and still get everything they want into a chip.

I have seen the future and it is very thin.

One of the coolest new technologies to surface in years is the thin-film battery. It can be printed on almost anything—paper, plastic, foil, ceramic, or even silicon—and then those batteries can be stacked like Pringles in a can (something that defies logic for potato-like substances) to create an even larger battery. They also can be spread across a larger device or building, absorbing and retaining electricity until it’s needed.

The uses for this kind of battery are still being worked on, although there doesn’t seem to be any shortage of ideas—everything from biometric sensors on credit cards to military battery packs. Thin-film batteries don’t store huge amounts of power, or at least not yet. But given the differences in weight and the ability to quickly recharge and empty these kinds of devices, because resistance is extremely low in both directions, this is likely to spawn a revolution in new applications.

For one thing, normal batteries weigh a lot. Try taking the batteries out of your laptop computer or a flashlight and you’ll instantly notice the weight difference. It’s most of the weight in your cell phone. And a soldier in the field can be hauling as much as 30 pounds worth of batteries for various electronics.

Batteries also tend to lose their charge over time. You realize that when you’re driving down the road and the cell phone goes dead. The first reaction is that you forgot to charge it, but then you remember you did charge it and the battery must be going. So you take it in to the nearest cell phone store and you buy a new phone, because the company has deemed that no model should ever last more than two years, and then you quickly forget about the whole incident.

Thin film batteries use a variety of technologies, including the standard lithium or lithium-thionyl chloride, but they also can be recharged more often even if those charges are much smaller than standard batteries. In addition, they don’t get nearly as hot because the density is much lower. It’s like heating a piece of foil in the oven versus a brick. You don’t want to pick up the brick without a heavy-duty hot pad.

Just how thin this technology can go and how much of a charge it can store is a matter of conjecture. But suffice it to say that changes are coming in all areas of electronics—both in what we use and how we use it. And those changes are beginning to show up in real products in interesting new ways.

—Ed Sperling