Archive for September, 2009

Intel’s Biggest Challenge

Friday, September 25th, 2009

Intel threw down the gauntlet this week at the Intel Developer Forum, issuing a veiled threat to almost every semiconductor company in every market where processing is done. And given the fact that processing is now done even by home appliances, in cars and even in outer space, that means just about everywhere.

Where Intel was the company was a little shy on details, though, was just how it intends to tackle some of those markets. While the company definitely has the capability and track record to attack anyone in the computer market—even IBM and HP sell servers with Intel chips these days—the real challenge is at the other end of the market.

Intel’s Atom chips are its lowest power offering. They’re also the platform it intends to use to bring x86 into the consumer world. At last count, though, the chips were running at minimum of 2 watts, with I/O adding another 1 or 2 watts on top of that. That’s clearly not what most consumers are looking for in battery-powered devices.

Intel has dropped vague hints about significantly cutting the power requirements of those chips. If the company can indeed achieve those power reductions, the outside world has not seen any details of how that will occur. In many cases, it may require a complete rewriting of the code that runs on the Intel Architecture, which could well make it less attractive to application developers—particularly those already committed to other platforms such as ARM or MIPS.

Intel is simultaneously working on an SoC strategy for the x86 architecture. Whether this will be combined or extended to the Atom line is unknown at this point. But it is unlikely the chip, using x86 software, will be able to match the low-power requirements of an embedded ARM core, or chips from Texas Instruments, Qualcomm or Broadcom. And despite its menu of options for what customers want in those chips, they will be a far cry from the programmability of a low-power FPGA like those from Actel.

Any threat from a giant like Intel has to be taken seriously. It has deep pockets, great research capabilities and lots of really, really smart people. But sorting out how much is real vs. bluster will take time. Intel has made threats before and loud splashes around everything from communications servers and chips to videoconferencing and embedded processors. And so far its base remains firmly entrenched in computers. They may use less power than before, but they still consume a lot.

–Ed Sperling

Money, Power And Politics

Thursday, September 17th, 2009

The battleground among chip developers is no longer performance. There are still speed demons out there who want more compute power, but they’re rapidly going the way of the Concorde supersonic jet. The bulk of us are content to fly on commercial airlines because they get us to our destinations fast enough—although in a packed cabin with no legroom, that never seems quite fast enough.

What isn’t negotiable, though, is power consumption. If you get performance as a side benefit, all the better. That’s at least part of the idea behind flash memory, which is dropping in price and becoming far more common. In devices that boot off flash, it eliminates the slow boot up time. And in applications that require it, flash adds more protection against single-event upsets and less failures. If you don’t take a hammer to the device, it probably will continue working almost indefinitely.

Nevertheless, it is power that will decide most of the market battles in the foreseeable future. It isn’t even always extremely low power. In the data center, techniques and technology that can lower power consumption can save millions of dollars for a company in a single year in power costs—everything from powering server racks to cooling them. In handhelds, it’s all about extending battery life.

On the chip development side, this isn’t easy. Nor is it cheap. In fact, the majority of development under way is being done across ecosystems. The most notable battle being fought now is by Intel and ARM on the embedded processor side. ARM’s strength is in the communications world, particularly cell phones, where it has built a huge following of applications and development partners. ARM’s strategy has always been to reach out to potential partners in an effort to win support and gain entry into new markets, and it has paid off handsomely.

Intel’s strength, meanwhile, is among application developers on the x86 platform. While it’s primary partner has always been Microsoft, it also supports the Mac OS, Linux, and various other versions of Unix. In short, it covers most of the known computing world. Intel’s push downward with the Atom chip, and out into vertical markets with its customizable SoC platform

Intel’s challenge is getting its power consumption down while still being able to provide enough functionality for its application developers. ARM’s challenge is continuing what amounts to a costly R&D battle against one of the deepest-pocketed technology companies on the planet.

If either company begins showing signs of new breakthroughs in this area, they also are likely to get additional support from end customers—the big phone makers, for example, or the makers of ultra-low power computing devices, whatever they may be. Those types of moves could have a significant effect on which company ultimately succeeds in these markets—at least for awhile.

This is a battle that is worth following, and one that will likely have huge benefits for any companies looking for the best ways to reduce power in complex devices. After all, this is where the money will be. It’s where the battle will be fought hardest. And it’s where the politics are likely to get very interesting.

–Ed Sperling

Pushing For Greater Reliability

Friday, September 11th, 2009

The classic tradeoffs of area, performance and power are starting to include a fourth factor—reliability.

At 90nm and above, it was bad enough to have to worry about fixing designs at the last minute—adding workarounds into the chip and staffing up with contract labor to solve problems to make sure a chip can be manufactured. But as we push down a few nodes—32/28nm in SoC design and 65nm in low-power FPGAs—the next big challenge for many designs will become reliability.

That challenge will manifest itself in numerous ways. A consumer buying a netbook or a smart phone may care about getting an extra hour or two of battery life, but they care far more that the system doesn’t crash. For anyone who ever had to reboot a smart phone, the common assumption is that software is always the culprit. It’s either bad coding or the prioritization of the applications. But sometimes it’s a hardware glitch that stems all the way back to the architecture, or a power design issue that wasn’t dealt with at the architectural level. And sometimes it’s a software issue that should have been worked out in the prototyping phase.

In aviation and aerospace, density is creating other sorts of problems. Single event upsets caused by cosmic radiation used to affect one bit. Now they’re affecting multiple bits. The standard solution has been adding error correction into the design, but at advanced nodes that adds to the overall power consumption and makes it significantly harder to manufacture chips at advanced nodes. Virtually everyone is heading into restrictive design at advanced nodes, which calls for much more orderly layouts and shapes—and far less back-wiring.

Solving these issues isn’t a simple matter of pushing a button. It goes all the way back to the initial architecture of a chip and the models used to create it. But it also can cost a company dearly if it gets this piece of the equation wrong. The entire chip may be functionally verified, with well-defined coverage models and metrics, and it still may experience problems. And if it does, the end-device company may choose a different chip for its next generation of products—or strike a new deal using the flawed design as leverage for better pricing.

–Ed Sperling