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Blog Review - Monday, March 23, 2015

Timely advice; PCIe Eagle soars at Open Power Summit; is the end nigh?; can you see unicorns?; Cadence and ARM- Innovus and Cortex-A72; ARM and the BBC encourage

Embedded World 2015 - An International View

With an accompanying conference program entitled ‘We are the Internet of Things’, the organisers of this year’s Embedded World, in Nuremberg, Germany, set out its stall with a ...

Yield Analysis: EDA Black Ops

Foundries rely on tools from PDF Solutions; designer should as well.

Using Physically Aware Synthesis Techniques to Speed Design Closure of Advanced-Node SoCs

Physically aware synthesis techniques that can help accelerate the physical design closure process for high-performance, power-sensitive SoCs at 28nm and below.

Cadence Introduces Innovus Implementation System

Cadence has introduced its Innovus Implementation System, a physical implementation solution that aims to enable system-on-chip (SoC) developers to deliver designs with best-in-class ...

News Stories & Blog Reviews

Blog Review – Monday February 2, 2015

2015’s must-have – a personal robot, Thumbs up for IP access, USB 3.1 has landed, Transaction recap, New talent required, Structuring medical devices, MEMS sensors webinar

Blog Review – Monday, January 26 2015

Finding fault tolerances with Cortex-R5; nanotechnology thinks big; Cadence, - always talking; mine’s an IEEE on ice; IP modeling

Blog review - Monday, Nov. 03 2014

Intel cooks up a vision of the IoT; Cadence turns up the verification volume; Synopsys celebrates being ‘-free’; ARM and AMD join RapidIO.org; Imagination adds some details to wearable ...

Technology Features

Feature Articles

Using Physically Aware Synthesis Techniques to Speed Design Closure of Advanced-Node SoCs

Physically aware synthesis techniques that can help accelerate the physical design closure process for high-performance, power-sensitive SoCs at 28nm and below.

Cadence Introduces Innovus Implementation System

Cadence has introduced its Innovus Implementation System, a physical implementation solution that aims to enable system-on-chip (SoC) developers to deliver designs with best-in-class ...

A Prototyping with FPGA Approach

In general, the industry is experiencing the need for what now has been started being called the “shift left” in the design flow. From a chip perspective, about 60%

ASIC Prototypes Take the Express Lane for Faster System Validation

The demand for shorter bring-up schedules and more efficient work flows are driving innovations by commercial providers of FPGA-based prototyping tools.

ASIC Prototyping With FPGA

Since the very early days of ASIC design engineers have prototyped the ASIC using FPGA devices in order to debug and verify the design. The advantage is that the

The Various Faces of IP Modeling

Providing all the needed types of models to successfully integrate an IP component into an advanced SoC is more complex than one would think.

Smart Bluetooth, Sensors and Hackers Showcased at CES 2015

Internet of Things (IoT) devices ranged from Bluetooth gateways and smart sensors to intensive cloud-based data processors and hackathons - all powered by ARM.

Round Tables

Deeper Dive - A 3D-IC round table - part II

What’s needed for 3D-ICs to flourish? asks Caroline Hayes, senior editor. Experts from Mentor Graphics, Altera and Synopsys have some ideas for future progress.

Deeper Dive - 3D-IC Part 1 Fri. July 11 2014

As the industry transitions from 2.5D to 3D-ICs, Caroline Hayes, senior editor, asked experts from Mentor Graphics, Altera and Synopsys for their view on what system designers need ...

Deeper Dive - IoT Security

With new roles, IoT security will become even more important. Caroline Hayes, Senior Editor, asked Steve Kester, Shantnu Sharma (both AMD), Rich Rejmaniak (Mentor Graphics) and Rob ...

Deeper Dive - Is IP reuse good or bad?

Caroline Hayes, Senior Editor asked four industry experts, Carsten Elgert, Product Marketing Director, IPG (IP Group), Cadence, Tom Feist, Senior Marketing Director, Design Methodology ...

Internet of Things (IoT) and EDA

Things that seem simple often turn out not to be. Implementing IoT will not be simple because as the implementation goes forward, new and more complex opportunities will present

Verification Management

As we approach the DVCon conference it is timely to look at how our industry approaches managing design verification. Much has been said about the tools, but I think

Deeper Dive – Dec. 05

By Caroline Hayes, Senior Editor The twists and turns of FinFET In an earlier Deeper Dive (Nov. 21) we looked at how TSMC’s 16nm FinFET reference design was encouraging harmony ...

Podcasts/Videos/Webcasts

Saygus V2 Android Smartphone

Saygus V² (V Squared), winner of the CES 2015 Innovation Award, has 320 GB of storage, ARM-based Qualcomm Snapdragon 801, 21 MP camera, dual-boot capable, 2.5GHz quad-core processor, ...

CES 2015: Expanding the Connected Experience

Power-efficient ARM technology is everywhere you are, expanding your connected life.

Interview with Pebble Watch founder

Getting the Pebble Watch to Market. A conversation with Eric Migicovsky, Pebble founder and CEO

ARM TechCon Videos: Interview with Ian Drew. Part 3: Futures.

Embedded editor Chris A. Ciufo chats with Ian Drew, CMO, ARM. In part 3 of 3 "Futures", the guys discuss: adding IoT "intelligence at the node"; the Sensinode acquisition for

ARM TechCon Videos: Interview with Ian Drew (Part 2: 'mbedding' the IoT)

Embedded editor Chris A. Ciufo chats with Ian Drew, CMO, ARM. In part 2, the guys discuss: ARM's mbed/mbed OS and Cortex-M7; the easy path to the IoT is made

ARM TechCon Videos: Interview with Ian Drew (Part 1: Servers)

Embedded editor Chris Ciufo chats with Ian Drew, CMO, ARM. ARM's move into 64-bit servers with HP's recent “Moonshot” announcement; how the IoT grows from the enterprise and handsets; ...

Why IP Providers Need the New 1149.1/JTAG

Intellitech's CEO CJ Clark explains why the latest JTAG update brings much needed capabilities to IP providers and IC developers alike.