SOI Goes Mainstream
Cheaper packaging, lower power consumption and limits on multicore software programming make a once exotic technology more viable.
Cheaper packaging, lower power consumption and limits on multicore software programming make a once exotic technology more viable.
Where the design activity is occurring and what the trends show.
IP-XACT is a major first step, but some experts say there are more challenges ahead.
First look at the semiconductor industry’s new forecast; China grows as a global center of startup activity and R&D
If no one can figure out how to scale applications, there may be serious ramifications to the entire electronics industry.
Changing market conditions and designer needs point to growth in software models and hardware prototypes.
The biggest names in verification have figured out some possible solutions to incompatibility. After all, it’s in their best interest.
But don’t expect miracles anytime soon…
Despite popular myths, not everyone learned software programming in college.
What verification engineers say about the most time-consuming part of chip development.
Analysis: What the economic downturn means for the chip industry.
But semi industry chief says it’s time for action in Washington
Teaming of IBM and ARM brings formerly exotic technology into mainstream, helping to create more energy-efficient designs.
The changing content at user groups may be the best indication yet that something is changing in the industry.
At older geometries chipmakers are measuring value versus what is needed by the application
Resignations” of five top executives viewed as significant and positive step by board; search for new CEO under way.
Emphasis is on low power, small footprint, better performance and full suite of tools and support.
Get ready for some recycled buzzwords.
Industry shows signs of maturing with fewer players, tighter integration and even customization.
Posted Sept. 24, 7 p.m.: IP and new processes make guesswork out of developing chips at the most advanced process nodes.
What verification engineers say about the most time-consuming part of chip development.
UC Berkeley’s Wireless Labs look at the challenges of utilizing the free, unused radio spectrum.
Complexity at the chip level is spilling over to board design.
At the Naval Postgraduate School in Monterey, Calif., the goal of these engineering students and professors is to create autonomous robot designs—ones that can be preprogrammed so that nothing can interfere with their design-in purpose
A look into the research underway at UC Berkeley’s Department of Electrical Engineering and Computer Science
ARM CEO Warren East talks about changes in system-level design.
A rare glimpse into system-level technology under development at the University of California’s Berkeley Wireless Research Center.
Mentor Graphics’ Jon McDonald talks about modeling strategies using the new standard.
Yervant Zorian, chief scientist at Virage Logic, talks about infrastructure IP to ensure the health of a chip.
Why is it so expensive to develop new chips? We asked Virage Logic Executive VP Brani Buric.
http://www.youtube.com/watch?v=sXbpnmtuLWs&feature=related