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Increasing Power Density of Electric Motors Challenges IGBT Makers

Mentor Graphics answers failure mode questions and simulation-testing for IGBT and MOSFET power electronics in electronic, hybrid-electronic vehicles (EV/HEV).

Accellera Relicenses SystemC Reference Implementation under the Apache 2.0 License

Accellera puts its SystemC material under Apache 2.0 license

Blog Review – Monday, August 15 2016

In this collection, we define the IoT, investigate IP fingerprinting, and break into vehicles in the name of crypto-research. There is also prophesizing about 5G and relationship advice ...

Verification Choices: Formal, Simulation, Emulation

In SoC verification Formal, Logic Simulation, and Emulation are not mutually exclusive, but must be made to coexist.

FPGAs for ASIC Prototyping Bridge Global Development

ASIC prototyping with FPGAs faces global development challenges in the hardware-software IoT and automotive markets.

News Stories & Blog Reviews

Blog Review – Monday, August 15 2016

In this collection, we define the IoT, investigate IP fingerprinting, and break into vehicles in the name of crypto-research. There is also prophesizing about 5G and relationship advice ...

Blog Review – Monday, July 25, 2016

This week, the blogsphere is chasing Pokemon, applying virtual reality as a medical treatment, cooking up a treat with multi-core processors, revisiting Hybrid Memory Cube, analysing ...

Blog Review – Monday, July 11, 2016

This week, our blog search finds: Put on your music shoes; Wi-Fi’s next big wave; Trust, listen and learn; The three Cs of IoT, and much, much more

Technology Features

Feature Articles

Power Analysis and Management

Cadence, Flex Logix, Mentor, Silvaco, and Sonics address power analysis and management topics.

Formal, Logic Simulation, hardware emulation/acceleration. Benefits and Limitations

A brief report on benefits and limitation of formal, logic simulation and hardware emulation/acceleration techniques for design verification

Verification Choices: Formal, Simulation, Emulation

In SoC verification Formal, Logic Simulation, and Emulation are not mutually exclusive, but must be made to coexist.

Collected Thoughts About DAC

Collected answers to questions I have heard over the years about DAC.

Cadence Releases Next-Generation Virtuoso Platform

Cadence has chosen to retain the user interface of the Virtuoso custom design product while adding enhancements that make it perform as a new product.

Future Challenges in Design Verification and Creation

With the growing introduction of Internet of Things (IoT) devices and applications, the issues of security and safety are becoming requirements to be verified.

New Test Compression Technology Reduces Test Time

2D Elastic Compression enables test time to be reduced by up to 3X without any impact on compression wirelength or fault coverage.

Round Tables

Deeper Dive - A 3D-IC round table - part II

What’s needed for 3D-ICs to flourish? asks Caroline Hayes, senior editor. Experts from Mentor Graphics, Altera and Synopsys have some ideas for future progress.

Deeper Dive - 3D-IC Part 1 Fri. July 11 2014

As the industry transitions from 2.5D to 3D-ICs, Caroline Hayes, senior editor, asked experts from Mentor Graphics, Altera and Synopsys for their view on what system designers need ...

Deeper Dive - IoT Security

With new roles, IoT security will become even more important. Caroline Hayes, Senior Editor, asked Steve Kester, Shantnu Sharma (both AMD), Rich Rejmaniak (Mentor Graphics) and Rob ...

Deeper Dive - Is IP reuse good or bad?

Caroline Hayes, Senior Editor asked four industry experts, Carsten Elgert, Product Marketing Director, IPG (IP Group), Cadence, Tom Feist, Senior Marketing Director, Design Methodology ...

Internet of Things (IoT) and EDA

Things that seem simple often turn out not to be. Implementing IoT will not be simple because as the implementation goes forward, new and more complex opportunities will present

Verification Management

As we approach the DVCon conference it is timely to look at how our industry approaches managing design verification. Much has been said about the tools, but I think

Deeper Dive – Dec. 05

By Caroline Hayes, Senior Editor The twists and turns of FinFET In an earlier Deeper Dive (Nov. 21) we looked at how TSMC’s 16nm FinFET reference design was encouraging harmony ...

Podcasts/Videos/Webcasts

FPGAs for ASIC Prototyping Bridge Global Development

ASIC prototyping with FPGAs faces global development challenges in the hardware-software IoT and automotive markets.

Clarifing Embedded IOT Connectivity Confusion

IOT Devcon interview with Vivek Mohan at Silicon Labs examines standards vs. proprietary IOT connectivity.

Highlights include Si-based molecular scanners; cyber-security; automotive standard ISO 26262; SPIE Photonics; DVCon

John/Sean Travelogue for March 2016 - Highlights include Si-based molecular scanners; cyber-security; automotive standard ISO 26262; SPIE Photonics; DVCon.

Business vs. Tech Side of Semi IP

CAST's CEO Explains the Business vs. Technical Side of Semiconductor intellectual property (IP), especially as verification becomes a critical part of the entire IP package.

Saygus V2 Android Smartphone

Saygus V² (V Squared), winner of the CES 2015 Innovation Award, has 320 GB of storage, ARM-based Qualcomm Snapdragon 801, 21 MP camera, dual-boot capable, 2.5GHz quad-core processor, ...

CES 2015: Expanding the Connected Experience

Power-efficient ARM technology is everywhere you are, expanding your connected life.

Interview with Pebble Watch founder

Getting the Pebble Watch to Market. A conversation with Eric Migicovsky, Pebble founder and CEO