Blog Review: June 10

Harry the ASIC guy takes a look at the myths and realities of FPGA design. We particularly like the part about how FPGA people get dressed in the morning. Harry Gries gets our Blog of the Week award for braving to go where most designers never would. It’s a good read.

Happy Holden’s blog about self-learning educational opportunities contains a free downloadable e-book about high-density interconnects. This is required reading if you’re unemployed or unhappy with your current job, but it’s just as important for engineers trying to put the various pieces of design together in their heads and make sense of it all. Don’t go here unless you have lots of time to spend, because you’ll probably be stuck here for quite awhile.

Janick Bergeron takes on protocol layering with transactors in VMM Central. This is great technical how-to information for verification engineers, and it’s something that chip architects should start thinking about before we get to the 32nm node.

Robin Bornoff serves up some really good technical insights on packaging and thermal modeling. Prior to 45nm, packaging was something you thought about after the chip was designed. It’s now an integral part of the design, and this is really good information from the mechanical engineering side of the house.

insights are in Mike Keating’s blog about rewriting code to simplify it and make it more understandable. You’ll need to click on the button marked Chapter 3, but there’s plenty of good insight there.

David Abercrombie’s blog about DFM for non-PhD.’s helps explain a very complex idea more simply. It’s still not simple, of course, but this is a step in the right direction.

Gabe Moretti’s entry on Magma’s try-it-for-free program is interesting. It’s more about the economics and value of EDA than Magma’s plan, and that’s where Gabe really shines. But we have to disagree with one element in Gabe’s view of the world: Given the choices in the picture, most design engineers would choose the girl.

–Ed Sperling

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