System-Level Design Challenges
Prasad Subramaniam, vice president of design technology at eSilicon, talks with System-Level Design Editor Ed Sperling about the challenges at future process nodes.
Tags: 22nm, eSilicon, System-Level Design
"In discussions in the investment community, the best investment play are device manufacturers looking at a full..." - Lou Covey

Deep Insights for Chip Architects and Engineers
Prasad Subramaniam, vice president of design technology at eSilicon, talks with System-Level Design Editor Ed Sperling about the challenges at future process nodes.
Tags: 22nm, eSilicon, System-Level Design