By Ed Sperling

Synopsys’ Frank Schirrmeister drills down into what’s going to drive the transition to System-Level Design. The answer is verification of the entire system, but there are a lot of hurdles to overcome in between. This is a great look at what’s changing, why it’s happening in slow motion and what will finally kick things into gear.

Mentor’s Colin Walls takes a look at software quality and just how difficult it is to prove it works properly all the time. While he’s absolutely right, software glitches will become increasingly relevant to many hardware engineers as software continues to become an ever-larger part of SoC design. This should make for some interesting discussions around the water cooler. Better order some extra water.

Want to watch 3D movies in your spare time? Then you’ll need to know about HDMI 1.4. Synopsys’ Navraj Nandra peels back the covers on what’s changed in the high-def multimedia interface. Just don’t forget to take off the glasses before you leave the house.

Daniel Nenni writes about Moore’s Law and improving yield at 28nm. It sounds simple enough in theory and there are some interesting tools available. Don’t count on everything going smoothly, though.

Cadence’s Ran Avinun looks at the importance of SystemC and its place relative to other languages. Given the developments by all the large EDA companies and the endorsement of high-level modeling based on SystemC, he’s clearly not alone.

JL Gray drills takes note of the next SystemVerilog standard. The ball starts rolling after DVCon next month, but don’t expect a new standard for a while. The market is just getting adjusted to the last iteration, SystemVerilog 2009.

And if you’re tired of looking at silicon and want to see the real world application of low-power engineering, check out Karen Bartleson’s new wheels, complete with photos. Realize, however, that mileage may vary. In some cases it may vary greatly.

In the world of verification—very deep in this world—you’ll find some interesting clues to using VMM 1.2 more effectively. Check out Kiran Maiya’s blog on using factories in an implicitly-phased environment.

Tags: Cadence, Mentor Graphics, Synopsys

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