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	<title>Comments on: Mind The Gap</title>
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	<link>http://chipdesignmag.com/sld/blog/2010/02/25/mind-the-gap/</link>
	<description>Deep Insights for Chip Architects and Engineers</description>
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		<title>By: Ken Karnofsky</title>
		<link>http://chipdesignmag.com/sld/blog/2010/02/25/mind-the-gap/comment-page-1/#comment-7222</link>
		<dc:creator>Ken Karnofsky</dc:creator>
		<pubDate>Fri, 26 Feb 2010 22:12:31 +0000</pubDate>
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		<description>Ed,

It’s good to see coverage of the topic design flow gaps between different levels of abstraction. However, the commentary was largely limited to an SoC hardware-centric perspective.  Here’s a view from the other side of the “gap.”

Virtual platforms may indeed be a big step forward for SoC verification and pre-silicon software development. However, because they still require C /C++ programming, they don’t fundamentally raise the level of abstraction or productivity for software development.  The discussion missed mentioning another approach that does raise the abstraction level, and is already widely adopted in the embedded software market: automatic C code generation from executable system models. This is proven technology that has been used in production for real-time embedded applications for many years, and has dramatically improved software productivity and quality. Notably, a similar methodology has been adopted by Xilinx and Altera to make FPGA design and implementation tractable to mainstream engineers.  This, too, is in widespread production use. 
  
Another aspect of today’s systems is that they are inherently interdisciplinary. It’s obvious that the complexities of systems that include software, digital, analog and even mechatronic components aren’t handled well by conventional design tools. Nor do they appear to be within the scope of ESL as it’s currently being discussed.  These interdisciplinary designs require simulation of different components with multidomain system models. This multidomain simulation technology, like automatic C code generation, is in widespread use. It enables system designers to optimize and verify systems across traditional design boundaries.  By performing these tasks well in advance of the implementation phase, engineers can correct the specification and requirements flaws that are the largest cause of project delays and re-spins.

Ken Karnofsky
The MathWorks</description>
		<content:encoded><![CDATA[<p>Ed,</p>
<p>It’s good to see coverage of the topic design flow gaps between different levels of abstraction. However, the commentary was largely limited to an SoC hardware-centric perspective.  Here’s a view from the other side of the “gap.”</p>
<p>Virtual platforms may indeed be a big step forward for SoC verification and pre-silicon software development. However, because they still require C /C++ programming, they don’t fundamentally raise the level of abstraction or productivity for software development.  The discussion missed mentioning another approach that does raise the abstraction level, and is already widely adopted in the embedded software market: automatic C code generation from executable system models. This is proven technology that has been used in production for real-time embedded applications for many years, and has dramatically improved software productivity and quality. Notably, a similar methodology has been adopted by Xilinx and Altera to make FPGA design and implementation tractable to mainstream engineers.  This, too, is in widespread production use. </p>
<p>Another aspect of today’s systems is that they are inherently interdisciplinary. It’s obvious that the complexities of systems that include software, digital, analog and even mechatronic components aren’t handled well by conventional design tools. Nor do they appear to be within the scope of ESL as it’s currently being discussed.  These interdisciplinary designs require simulation of different components with multidomain system models. This multidomain simulation technology, like automatic C code generation, is in widespread use. It enables system designers to optimize and verify systems across traditional design boundaries.  By performing these tasks well in advance of the implementation phase, engineers can correct the specification and requirements flaws that are the largest cause of project delays and re-spins.</p>
<p>Ken Karnofsky<br />
The MathWorks</p>
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