Due to its simplicity, low cost and flexibility, the ubiquitous USB interface is used in over 2 billion devices. With the next generation of applications requiring higher bandwidth for faster “sync-and-go” functionality between PCs and portable electronic devices, the latest SuperSpeed USB (a.k.a. USB 3.0) standard delivers more than 10x the data transfer rate of Hi-Speed USB (USB 2.0) operating at 5Gb/s and is backwards compatible with previous USB technologies. SuperSpeed USB’s sophisticated physical (PHY) and protocol layers incorporates advanced features and functionality, which add complexity to both the development and verification efforts. SuperSpeed USB introduces challenges at both the physical and protocol layers. The protocol layer of the specification adds rigid power management states, which are mandatory to achieve SuperSpeed USB certification. The SuperSpeed USB physical layer delivers 5 Gb/s signaling, 8b/10b encoding carrying an embedded clock and support for active power states.

Software is a critical component for the development of USB-based designs. In efforts to start software development early and to make it as productive as possible, design teams are often utilizing virtual and FPGA prototypes for software development prior to silicon. While FPGA prototypes can still be made available prior to silicon, virtual prototypes can be utilized even before RTL is available.
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Tags: Synopsys

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