Experts At The Table: Emulation
By Ed Sperling
System-Level Design sat down to discuss emulation technology and challenges with Narendra Konda, director of hardware engineering at Nvidia; Kasturi Rangam, director of engineering at Nethra; Jim Kenney, director of marketing for Mentor Graphics’ Emulation Division; Ran Avinun, marketing group director for system design and verification at Cadence; and Lauro Rizzatti, vice president of worldwide marketing and generation manager of Eve USA. What follows are excerpts of that conversation.
SLD: Where will the growth come from in the emulation market?
Avinun: To increase the overall market from roughly $150 million to $200 million to twice that, it will have to grow from new areas. There are some applications that never considered emulation in the past. You start to see companies like ARM where their IP is a huge design. It’s multicore, it’s embedded software—it’s a huge design. Looking at their road map for the next few years, I can’t think of how people would be able to start to integrate those processors without using one of their systems. The problem is going to be so complex there is no way to do it. Some will move to higher levels of abstraction, but everyone needs the high fidelity, the cycle-accurate environment, and they will not be able to tapeout without going through these steps.
SLD: From the vendor side, what do Cadence, Mentor and Eve see as the customers’ problems?
Kenney: More and more customers see the value in verifying the software against the hardware. We have a customer that has 12 people in their hardware verification team and when they get that design running on hardware there are 185 software engineers running code. Their goal is that when the chip comes back the entire software environment is ready to roll. They’ve done their hardware verification a while ago. Finding bugs in the hardware is valuable. But having the software ready and gaining three to six months on the product cycle is huge. That’s the direction. Eventually people will have larger chips that outpace simulation and have to go to emulation, but the real value is in hardware-software co-verification.
Avinun: They want to be able to scale the bring-up time, the debug, the turnaround time they get today from our systems into the high performance. Ideally, what they want is to turn a knob and get 200MHz or 300MHz performance, which today is not possible because you need a single database or multiple platforms based on a single database. Improving bring-up time, compile, turnaround time, debug, and then switch to high performance is not an easy problem to solve. There are multiple ways to potentially look at this, but this is one of the challenges. It’s driven by the fact that the software guys are saying they want to see this environment as early as they can, and they want it to run fast. They want it in five minutes. If you can provide performance, fast bring-up time and predictability, they will be willing to pay for it. But it’s the ability to move from high-capacity to high-speed environments.
Rizzatti: In the 1990s, emulation was used for CPUs and graphics. You wouldn’t see emulation in any other industry. Today it’s in automotive, wireless, multimedia graphics and others. But revenues 10 years ago were $250 million. Today they’re $150 million.
SLD: From the customer standpoint, is this correct?
Konda: The opportunity for emulation is certainly there just because the complexity of the chips is going up and up, whether you’re a small company or a large company. There has to be a tool that can solve these problems. Simulation doesn’t cut it. The next best thing is emulation. But the single biggest problem I see for this technology is the cost. It’s still prohibitively expensive. Unless this technology comes to the price of a Sun workstation, it will not proliferate across the entire engineering community. Is that possible? I don’t think it’s impossible. It may not be $20,000, but it may be $100,000 versus $1 million to $3 million today. You need to bring that down by 10x.
Avinun: But how many of your engineers are running a regression test on a single SPARC workstation? A Sun workstation or Dell workstation is just one station in a farm.
Konda: The point is how you proliferate this technology. At the present numbers and this kind of cost model, it cannot proliferate. There will be one or two copies, and in a big company like Intel or Nvidia there might be 10 copies or 20 copies.
Kenney: In your case the problem is amplified because your chip is so large and so complex. We will continue to bring the prices down for small to midsize chips.
Konda: If we have a 3 billion transistor chip we have one copy, and we don’t give this copy to every engineer. Since it is highly pipelined, I can give it to each software designer. Will I be able to give one copy of this pipelined design to my 200 software engineers? No. I can use 7 copies, and they are multiplexing to four hours for this guy, five hours for this guy, three hours for this guy. I would like to be using it 24 hours a day. It is the cost. Maybe some new innovation has to happen in emulation that can bring it down by several orders.
Rizzatti: I’d like to ask a question of Netrha. What do you think would be fair for an emulation system for a 20 million-gate design?
Rangam: A few years back we were able to build a custom FPGA board for about $10,000. We built multiple boards. For a 20 million-gate design I would probably pay about $20,000 to $25,000 per board. That’s one of our criteria for emulation. We want a single platform that is portable—and portability is key for us so we can ship to our customers in India and China—and that we can use for verification, software development, and architecture analysis. You cannot have different versions of the same chip on different platforms. Otherwise it takes too much time. If you have the same version on the same platform that you know the customers will be using, whether it’s internal customers like the software development team or external customers, that is the key for emulation. It needs to be a single platform for everyone to use.
Avinun: What are you going to do if you can’t get to this cost number?
Rangam: That’s where you separate hardware and software. If we cannot get there in a cost-effective manner, we will build the boards. We know what it needs to connect to. We will build all the necessary peripherals instead of building models. You bring in the software into this. That can be used for verification and software development and you can ship it to anyone.
SLD: There seems to be a disconnect between the vendors and the customers.
Konda: That’s what people are doing today. You either hand-roll your own FPGA board or you go out and buy boards from Dini, and we buy software from Synplicity/Synopsys. We source software and hardware from multiple places and we put it together.
Avinun: But you don’t do it for your largest designs?
Konda: No, but for the smaller designs. That way we can contain the cost. If a single solution was available for $50,000 or $70,000, or even $20,000 more and I didn’t have to go to five companies for a solution, then that would be worth it. But today that’s not the case.
Tags: Cadence, EVE, Mentor Graphics, Nethra, Nvidia