Blog Review: Sept. 1
What happens when you bend SerDes signals in different ways? Not what you’d expect, according to Mentor’s Jian Zheng, and not the same thing at every frequency. That discrepancy creates some very interesting problems for designers.
Andrew Piziali, writing in Synopsys’ VMM Central, takes a look at the role of the technical marketing engineer and why they’re first in line for a corporate beheading—figuratively, in most cases.
Cadence’s Wei Tan has five tips to help you finish your low-power design tapeout on time. There’s some really good information in this one, but it remains really hard stuff to master.
ARM’s Kerry McGuire Balanza asks why all textbooks aren’t on an interactive e-reader. So far there don’t seem to be any good answers. There doesn’t even seem to be any research.
Atrenta’s Mike Gianfagna digs into the role of product lifecycle management and what it can mean for EDA companies. It’s an interesting thought.
Mimasic’s Bhanu Kapoor identifies some key developments in the universal verification methodology. If verification is part of your job, this is a must read. If not, hand it off to the right person on your team.
Mentor’s Colin Walls talks about the accuracy of programming languages—most of the time. But there are exceptions, and even some errors.
If you had any doubt that the chip industry is splitting into two parts, check out the stats from Semico’s Joanne Itow. The smaller foundries are growing at a faster pace than the big foundries. Granted, that’s starting from a smaller number, but it’s still indicative of growth occurring on both sides of Moore’s Law.
JL Gray pays homage ot the winner of this year’s Phil Kaufman Award, Pat Pistilli. Nice going Pat, and nice recognition by JL.
Synopsys’ Navraj Nandra looks at what’s involved in booting a netbook faster. It’s more than just the solid-state drive.
Cadence’s Richard Goering digs into on-chip variation, which is becoming more serious at 32nm and below. This is a big problem for advanced designs. The good news is people are talking about it. The bad news is there’s no simple solution.
What happens if you can’t do independent compliance testing in EDA? Not much, apparently, according to Synopsys’ Karen Bartleson. There are reasons, of course.
And way, way down in the coded world, ARM’s Jacob shows how to detect overflow from arithmetic operations.
Tags: ARM, Atrenta, Cadence, Mentor Graphics, Mimasic, Semico, Synopsys











