Blog Review: Sept. 28
By Ed Sperling
Cadence’s Richard Goering looks at seven emerging protocol and memory interface standards for mobile devices and what’s being done to verify them. If you’re searching for a single answer, there isn’t one.
Synopsys’ Eric Huang boots Windows 8 from a USB Flash Drive. Apparently it works okay on USB 2.0, but it should boot faster on 3.0. Don’t lose the memory stick, though. This is the kind of thing you want sewn into your body somewhere, but you always have to consider what the TSA would think about it when they pull you aside following an airport body scan.
Mentor’s Colin Walls is holding a contest of sorts for an evolving corner of engineering–efficient code. There’s no prize, which may give you some idea of just how evolving this is. And if you get it right, some people might still argue that you’re wrong. But then again, there are people who believe the Earth is flat and that Einstein’s theory of relativity is absolute.
Cadence’s Frank Schirrmeister summarizes a holistic design presentation given in Munich by Hermann Eul, president of Intel Mobile Communications. In case you’ve never heard of this group, it was created earlier this year following Intel’s $1.4B acquisition of Infineon’s wireless business.
Agnisys’ Nitin Ahuja, writing in Synopsys’ VMM Central, looks at closed loop register verification using the register abstraction layer format, aka RALF. If your name is Ralph and you work with this stuff, you probably have a lot of explaining to do.
Mentor’s John Isaac looks at virtual prototyping vs. physical prototyping, and best practices in getting designs out the door quickly, efficiently and with fewer problems.
Cadence’s Tom Anderson adds some outdated real-world assertions to his ongoing commentary on the English language.
Synopsys’ Hezi Saar looks at rapid silicon bring-up, as demonstrated by Freescale with its quad-core reference design. It worked, too. We don’t really know much beyond that, but the numbers sound impressive.
Cadence’s Jason Andrews adds his next installment about using UART in virtual platform simulation. This is turning into an epic. Edward Gibbon, move over.
And in case you missed the most recent System-Level Design newsletter, here are some standout blogs:
–Industry investor Jim Hogan introduces Jobs’ Law, drilling down into what made Steve Jobs so unique. This is an interesting takeaway from an electronics industry icon.
–Mentor’s Jon McDonald looks at ways to improve functional verification by understanding how the system actually is supposed to be used.
–Cadence’s Frank Schirrmeister shines a spotlight on software and its importance in future SoC designs.
–Synopsys’ Achim Nohl debunks some myths and looks at the facts of software debugging with virtual prototypes.
–Atrenta’s Tiffany Sparks looks back over the past decade and just how far we’ve progressed, starting with the iPod.
–Sonics’ Frank Ferro looks at on-chip bottlenecks and how to solve them.
–And Arteris’ Kurt Shuler examines the tradeoffs between the dueling inter-chip connectivity standards of MIPI LLI and C2C.
Tags: Agnisys, Arteris, Atrenta, Cadence, Mentor Graphics, Sonics, Synopsys