Viable Product Development At 22nm
The end of classical scaling at 90nm and the introduction of a broad array of challenges that now have to be dealt with at every process node beyond 65nm has changed IC design forever. Design, manufacturing and production must be tied together more closely than ever in order to address the challenges of power, electrostatic discharge (ESD), electromagnetic interference (EMI), IP integration, complex packaging options and manufacturing yield. Few companies have the focused resources within each of these disciplines to successfully complete chips. Fabless semiconductor companies and medium-sized semiconductor companies that own their own fabs are forced to reconsider their business models looking outside for the high level of expertise required to complete the design and manufacture of chips.
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Tags: eSilicon