The Week In Review: April 20
By Ed Sperling
Mentor Graphics rolled out the next release of its Questa verification platform, bolstering its UVM support, accelerating coverage closure and adding low-power verification based upon UPF.  It also added MIPI protocol verification IP to the Questa IP library. On the software front, Mentor moved its BridgePoint UML editor into the open source domain, and it teamed up with Stonestreet One to unveil an integrated low-power Bluetooth software stack for Mentor’s Nucleus embedded RTOS.
Synopsys won a deal with Renesas, which has adopted its Proteus LRC for lithography verification.
Atrenta took a different tack in the IP utilities business. It’s allowing companies to use its IP cleaning kit on their IP blocks for two weeks at no cost, testing design completeness, power consumption and integration risks, among other things.
Arteris won a deal with Core Logic, which has licensed its FlexNoC interconnect IP for its next-gen mobile and multimedia processors.
Tensilica won a deal with Renesas for its digital baseband signal processing IP core, which will use those cores in its upcoming products for digital broadcasting receivers.
Tags: Arteris, Atrenta, Core Logic, Mentor Graphics, Renesas, Stonestreet One, Synopsys, Tensiulica