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EDA-IP Update

By Caroline Hayes, Contributing Editor

Photomask, the industry’s Cinderella

Underappreciated and undervalued, a survey by Sematech is a rallying call for the photomask technology industry.

The semiconductor research company concluded that the odds are stacked against photomask technology as complexity increases at each node progression, mask fabrication is becoming more expensive and time consuming with technologies (multiple patterning, extreme ultraviolet (EUV) lithography to name but two), are all problems compounded by rising mask costs.

Mark LaPedus reports in Chip Design that at the most advanced nodes, a leading-edge mask-set sells for a $2 million to $3 million–or roughly $100,000 per critical layer, according to experts. Yet reticle prices are falling – and falling fast, with a leading-edge mask-set selling for roughly 10% of its original price, after a reticle moves into mass production over a one-to-two year period, according to experts.

In a keynote presentation at the SPIE Photomask conference, Michael Mayberry, vice president of the Technology and Manufacturing Group and director of components research at Intel, wanted recognition for the technology: “The question is,” he said, “if masks are so integral, then why don’t you get paid for them? The end answer is that (photomasks) are buried too deep in the bowels of the machine for people to really appreciate the value.”

LaPedus also reports that photomask revenues have been relatively flat, around $3 billion level for the last two years, according to VLSI Research, and the mask equipment market valued at approximately $1 billion.

Although 28nm node business has been brisk, the majority of shipments are low margin masks, with nearly 45% of shipments at reticles 250nm or above. Less than 4% of shipments are higher margin reticles of 22nm to 32nm and just 1.2% are below 22nm.

The huge investment needed to be leading edge (an estimated at $110 million to $140 million to set up a 28nm photomask shop, or $350 million to $400 million for a new 10nm mask production site) means that many fall by the wayside. LaPedus reports that there are less than a dozen leading-edge mask shops today.

Human brain inspires chip design

Researchers at IBM demonstrated a building block of chip architecture based on a scalable, interconnected, configurable network of “neurosynaptic cores”. Their inspiration? The human brain’s computing efficiency, size and power usage.

As part of the SyNAPSE (Systems of Neuromorphic Adaptive Plastic Scalable Electronics) project, IBM researchers led by Dharmendra S. Modha demonstrated the architecture based on a scalable, interconnected, configurable network of “neurosynaptic cores” that brought memory, processors and communication into close proximity.

Their model was the cognitive capabilities of the human brain: understanding the surrounding environment, dealing with ambiguity, acting in real time and within context – all while consuming less power than a light bulb and occupying less space than a two-liter bottle of soda.

When the initial prototype chips were created, each neurosynaptic core had to be programmed. A new software ecosystem was created that support all aspects of the programming cycle – from design through development, debugging and deployment. It could enable a new generation of applications that mimic the brain’s abilities for perception, action and cognition.

To make cognitive applications easier to build and to help create an ecosystem of application developers, the team has created composable, reusable building blocks called corelets. Each has a particular function, for example, perceiving sound, and can be configured to create new applications. The programmer could use that corelet in conjunction with others that represent edge detection and color identification to develop a new application using sight and sound capabilities, without programming individual neurosynaptic cores.

While the cognitive chip has yet to be released, developers can begin to write code using a simulator that the team developed to create and test their ideas. So far, a library of 150 corelets has been developed by the researchers, with plans to allow third parties, following a rigorous testing process, to submit more.

The long-term goal is to build a neurosynaptic chip system with 10 billion neurons and 100 trillion synapses, all while consuming only 1kW of power and occupying less than two liters of volume.

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hayes_carolineCaroline Hayes has been a journalist, covering the electronics sector for over 20 years. She has worked on many titles, most recently the pan-European magazine, EPN. Now a freelance journalist, she contributes news, features, interviews and profiles for electronics journals in Europe and the US.

In a previous role, as editor of EPD, she created the e-Legacy Awards and also managed and chaired EPN’s 40th Anniversary Forum at electronica 2012.

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