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Deeper Dive – Thurs. June 05 2014

Initiative allows IP exploration

At DAC this week, Synopsys announced the IP Accelerated Initiative. Ahead of the convention in San Francisco, Caroline Hayes, spoke to Dr Johannes Stahl.

Like many other companies, Synopsys supplies IP, but now it can offer the first pre-packaged way to access IP. It is, says Dr Johannes Stahl, Director, Product Marketing, Virtual Prototyping, Synopsys, a means to deliver configured IP for accelerated test. “ Today, software is more complex and the customer has to develop it and make sure it is working,” he says. “There is less time to dive into complex design blocks, with HDMI, USB and more IP to be integrated.” The challenge today is that each design integration is a unique SoC architecture, which varies from customer to customer. In addition to configuring the IP, it is a time consuming process to map it to an FPGA, add I/O, reset logic and interface with a processor and its OS, all before the test stage. “[The current model] is not a case of plug-and-play,” concludes Stahl.

The Initiative introduces some new DesignWare IP development kits, with IP prototyping kits and IP virtual development kits. “Designers have to modify a reference design; there is little value without the ability to modify,” he says, explaining how the fast iteration flow can ease tensions between hardware and software teams. The IP prototyping kits provide a validated IP configuration – a starting point for hardware engineers to explore what might need to be design tradeoffs to meet the application goals. This is estimated to accelerate prototyping for development software by three months. The next stage is for the software team to take charge and to debug and speed up system integration using the real-world I/O capabilities. After all, says Stahl, software can only begin when there is the target defined. He estimates that the value for the customer is to save the customer four to six weeks, let alone the investment in IP, by helping customers to connect, prototype and run the hardware at a reasonable speed and to debug it with basic software. “Engineers can immediately explore the IP and can modify it within range, with corresponding changes in the software within the reference design,” he explains. This addresses what Stahl is says the second biggest problem for designers today – there is no hardware for the software team and changes to requirements can interrupt a fast iteration flow.

So just what is included in the Initiative? The core is the DesignWare IP and new IP prototyping kits, the virtual development kits and customized IP subsystems.

There is a reference design pre-loaded onto the company’s established HAPS-DX prototyping systems, with pre-configured IP and SoC integration logic. There is also a PHY daughterboard, simulation testbench and a DesignWare ARC processor-based 32bit software development platform running Linux OS, together with reference drivers and application examples.
To modify standard IP, there is the company’s coreConsultant IP configuration tool, its ProtoCompiler DX synthesis and debug tool and compilation scripts.

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