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Blog Review – Monday, June 12, 2017

Monday, June 12th, 2017

This week, we find traffic systems for drones and answers to the questions ‘What’s the difference between safe and secure?’ and ‘Can you hear voice control calling?’

An interesting foray into semantics is conducted by Andrew Hopkins, ARM, as he looks at what makes a system secure and what makes a system safe and can the two adjectives be interchanged in terms of SoC design? (With a little plug for ARM at DAC later this month.)

It had to happen, a traffic system designed to restore order to the skies as commercial drones increase in number. Ken Kaplan, Intel, looks at what NASA scientists and technology leaders have come up with to make sense of the skies.

Voice control is ready to bring voice automation to the smart home, says Kjetil Holstad, Nordic Semiconductor. He highlights a fine line of voice-activation’s predecessors and looks to the future with context-awareness.

More word play, this time from Tom De Schutter, Synopsys, who discusses verification and validation and their role in prototyping.

Tackling two big announcements from Mentor Graphics, Mike Santarini, looks at the establishment of the outsourced assembly and test (OSAT) Alliance program, and the company’s Xpedition high-density advanced packaging (HDAP) flow. He educates without patronizing on why the latter in particular is good news for fabless companies and where it fits in the company’s suite of tools. He also manages to flag up technical sessions on the topic at next month’s DAC.

Reporting from IoT DevCon, Christine Young, Maxim Integrated, highlights the theme of security in a connected world. She reviews the presentation “Shifting the IoT Mindset from Security to Trust,” by Bill Diotte, CEO of Mocana, and In “Zero-Touch Device Onboarding for IoT,” by Jennifer Gilburg, director of strategy, Internet of Things Identity at Intel. She explores a lot of the pitfalls and perils with problem-solving.

Anticipating a revolution in transportation, Alyssa, Dassault Systemes, previews this week’s Movin’On in Montreal, Canada, with an interview with colleague and keynote speaker, Guillaume Gerondeau, Senior Director Transportation and Mobility Asia. He looks at how smart mobility will impact cities and how 3D virtual tools can make the changes accessible and acceptable.

Caroline Hayes, Senior Editor

Blog Review Monday, May 8, 2017

Monday, May 8th, 2017

This week, there is some N7 news, and the beginning of an HPC renaissance; ARM survives a mountain-top ordeal and Intel has a strategy for IoT; Odd place for sunburn

https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/archive/2017/05/05/tsmc-n7

TSMC’s 7nm process is detailed by Paul McLellan, Cadence, from a visit to CDNLive Silicon Valley. His report is well illustrated and informative.

Predicting a second renaissance in high-performance computing (HPC), Prasad Alavilli, ANSYS, explains the role of CFD and the state-of-play for HPC and what that means for chip design.

Likening Internet security to the American ‘wild west’, Alan Grau, Icon Labs, fears for security measures and corrective actions. He looks at some recent attacks and cures and advocates a strong stance on security.

I suspect Scott Salzwedel, Mentor Graphics, is rather excited about the New Horizons spacecraft, which is due to emerge from its hibernation. His enthusiasm is infectious, and his well-illustrated blog puts the reader as in thrall to the project – and the role of the company’s own Nucleus RTOS – as he clearly is.

The three phases of the IoT revolution are set out by Aaron Tersteeg, Intel. He sets out a clear plan to nuture big ideas and how technology can support the evolution.

PVT (process, voltage and temperature) sensor systems are exciting Rupert Baines, UltraSoC. He considers the company’s co-operation with Moortec Semiconductor, and what this means for SoC monitoring.

Life is not looking too rosy for ARM engineer Matt Du Puy and fellow climbers, at the moment. They are stuck on Mt Kanchenjunga in Nepal, without the drone copter that was confiscated by customs officials. True the team has a toolbox of ARM-powered devices, like the Suunto Ambit smartwatch, satellite beacon, Outernet networking device, Google Pixel smartphone, Go Pro and Ricoh Theta 360-degree camera, reports Brian Fuller, ARM, but there is also sunburn – inside the nostrils (eughhh!).

Caroline Hayes, Senior Editor

Blog Review – Monday, April 24, 2017

Monday, April 24th, 2017

This week’s blogs are concerned with AI and intelligent, connected vehicles, sometimes both. There are quests to find the facts behind myths and searches for answers for power management and software security too.

Is an effective tool for verification, the stuff of legends? Gabe Moretti, Chip Design Magazine, seeks the truth behind Pegasus – no, not the winged horse, the more earthly verification engine from Cadence.

A power strategy is one thing, but a free trial adds a new dimension to energy management. Don Dingee, Sonics, elaborates on the company’s plan to bring power to the masses, using hardware IP and ICE-Grain Power architecture.

If you are unsure about USB, Senad Lomigora, ON Semiconductor’s blog should help. It looks at what it’s for, why we can’t get enough of USB Type C, USB 3.1, connectors and re-drivers.

Every vehicle’s ADAS relies on good visuals, observes Jim Harrison, guest blogger, Maxim Integrated, and good connectivity. He looks at the securely connected autonomous car, and then homes in on explained how Maxim Integrated exploits GMSL, an alternative to Ethernet, in its MAX96707 and MAX96708 chips, to create an effective in-car communication network.

Still with the connected car, Pete Decher, Mentor Graphics, is fresh from the Autotech Council meeting in San Jose. The company’s DRS360 Autonomous Driving Platform launch was high on the list of discussion topics, along with the role of artificial intelligence (AI) in the future of driving.

Still with AI, Evens Pan, ARM provides an in-depth blog on Chinese start-up, Peceptin’s enabled embedded deep learning. The case study is fascinating and well reported in this comprehensive essay.

Making any software engineer feel insecure about software security is an everyday occurrence, helping them out is a little more out-of-the-ordinary, so if it refreshing to see a post from the editorial team, Synopsys, letting the put-upon software engineer know there is a webinar coming soon (May 2) to enlighten them on the Building Security In Maturity Model (BSIMM), with a link to register to attend.

Caroline Hayes, Senior Editor

Blog Review – Monday, April 10, 2017

Monday, April 10th, 2017

This week, there are traps and lures in the IoT, as discussed by ARM and Maxim Integrated; Xilinx believes a video tutorial is a good use of time; Get cosy with SNUG for some insight; and ON Semiconductor is keeping an eye on you

Beware of delivery men bearing IoT gifts, warns, Donnie Garcia, ARM, who also looks at trap doors and NXP’s Kinetis KBOOT bootloader to foil a new attack vector and advertise a related webinar on April 25.

Nagging parents had the right idea, decides Russ Klein, Mentor Graphics, remembering entreaties to turn off lights, and whose energy saving advice he now applies to SoCs and embedded systems, with the help of the Veloce emulator.

Gabe Moretti, Chip Design, gets a bit saucy, trying to figure just what is Portable Stimulus. He gets down to the nitty gritty with how the Accellera System Initiative can help, but still believes some areas need to attended to. Let’s hope the industry pays heed.

More warnings from Kris Ardis, Maxim Integrated, and connected devices. While a Jacquard print may not be to everyone’s taste, the idea of protecting the IoT and its data has universal appeal.

The appeal of Agile design is not lost on Randy Smith, Sonics, who writes about the concept and Agile software development. He deftly dives into advances in Agile hardware design and IC methodology for Agile techniques – keeping every design engineer on their toes.

A visit to ISC West, the security expo, has made Jason Liu, ON Semiconductor, think about surveillance systems, as he throws a spotlight on one of the company’s introductions.

14 minutes does not sound like a long time to pack in all you need to know about Zynq UltraScale+ MPSoCs and Vivado Design Suite, but Steve Leibson, Xilinx points readers towards an interesting, informative video, which he describes as a fast and painless way to see the development tools used in a fully operation system.

It sounds like a self-satisfied neck-warmer, but SNUG (Synopsys User Group) events can be informative. Tom De Schutter attended the one in Silicon Valley and relates what he learned from the technical track with experts from ARM, NVIDIA, Intel and Synopsys about prototyping latch-based designs, ARM CPU and GPU increasing densities and more besides.

Striving to improve the lot of IoT designers, John Blyler, Embedded Systems, talks to Jim Bruister, SOC Solutions, about markets, licensing, open source and five elements that will drive improvement.

Compiled by Caroline Hayes, Senior Editor

Blog Review – Monday, March 27, 2017

Monday, March 27th, 2017

How AI can be used for medical breakthroughs; What’s wired and what’s not; A new compiler from ARM targets functional safety; Industry 4.0 update

A personal history lesson from Paul McLellan, Cadence Design Systems, as he charts the evolution from the beginning of the company, via the author’s career and various milestones with different companies and the trials of DAC over the decades.

Post Embedded World, ARM announced the ARM Compiler 6. Tony Smith, ARM, looks at its role for functional safety and autonomous vehicles.

A review of industrial IoT at Embedded World 2017 is the focus for Andrew Patterson’s blog. Mentor Graphics had several demonstrations for Industry 4.0. He explains the nature of Industry 4.0 and where it is going, the role of OPC-UA (Open Platform Communication – Unified Architecture) and support from Mentor.

What’s wired and what’s wireless, asks David Andeen, Maxim Integrated. His blog looks at vehicle sub-systems and wired communications standards, building automation and wired interface design and a link to an informative tutorial.

There are few philosophical questions posed in the blogs that I review, but this week throws up an interesting one from Philippe Laufer, Dassault Systemes. The quandary is does science drive design, or does design drive science? Topically posted ahead of the Age of Experience event in Milan next month, the answer relies on size and data storage, influenced by both design and science.

Security issues for medical devices are considered by David West, Icon Labs. He looks at the threats and security requirements that engineers must consider.

A worthy competition is announced on the Intel blog – the Artificial Intelligence Kaggle competition to combat cervical cancer. Focused on screening, the competition with MobileODT, using its optical diagnostic devices and software, challenges Kagglers to develop an algorithm that classifies a cervix type, for referrals for treatment. The first prize is $50,000 and there is a $20,000 prize for best Intel tools usage. “We aim to challenge developers, data scientists and students to develop AI algorithms to help solve real-world challenges in industries including medical and health care,” said Doug Fisher, senior vice president and general manager of the Software and Services Group at Intel.

Caroline Hayes, Senior Editor

Behold the Intrinsic Value of IP

Monday, March 13th, 2017

By Grant Pierce, CEO

Sonics, Inc.

Editor’s Note [this article was written in response to questions about IP licensing practices.  A follow-up article will be published in the next 24 hours with the title :” Determining a Fair Royalty Value for IP”].

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Understanding the intrinsic value of Intellectual Property is like beauty, it is in the eye of the beholder.  The beholder of IP Value is ultimately the user/consumer of that IP – the buyers. Buyers tend to value IP based upon their ability to utilize that IP to create competitive advantage, and therefore higher value for their end product. The IP Value figure above was created to capture this concept.

To be clear, this view is NOT about relative bargaining power between buyer and the supplier of IP – the seller –  that is built on the basis of patents. Mounds of court cases and text books exist that explore the question of patent strength. What I am positing is that viewing IP value as a matter of a buyer’s perception is a useful way to think of the intrinsic value of IP.

Position A on the value chart is a classification of IP that allows little differentiation by the buyer, but is addressing a more elastic market opportunity. This would likely be a Standard IP type that would implement an open standard. IP in this category would likely have multiple sources and therefore competitive pricing.  Although compliance with the standard would be valued by the buyer, the price of the IP itself would be likely lower reflecting its commodity nature. Here, the value might be equated to the cost of internally creating equivalent IP. Since few, if any, buyers in this category would see advantage for making this IP themselves and because there are likely many sellers, the intrinsic value of this IP is determined on a “buy vs buy” basis.  Buyers are going to buy this IP regardless, so they’ll look for the seller with the proposition most favorable to the buyer – which often is just about price.

Position B on the value chart is a classification of IP that allows for differentiation by the buyer, but addresses a more elastic market. IP in this category might be less constrained by standards requirements. It is likely that buyers would implement unique instantiations of this IP type and as a result command some end competitive advantage. Buyers in this category could make this IP themselves, but because there are commercial alternatives, the intrinsic value is determined by applying a “make vs buy” analysis. The value proposition of the sellers of this type of IP often include some important, but soft value propositions (e.g., ease of re-use, time-to-market, esoteric features), the make vs buy determination is highly variable and often buyer-specific. This in part explains the variability of pricing for this type of IP.

Position C on the value chart is a classification of IP that serves a less elastic market and empowers buyers to differentiate through their unique implementations of that IP. This classification of IP supports license fees and larger, more consistent, royalty rates. IP in this category becomes the competitive differentiation that sways large market share to the winning products incorporating that IP. This category supports some of the larger IP companies in the marketplace today. Buyers in this category are not going to make the IP themselves because the cost of development of the product and its ecosystem is too prohibitive and risky. The intrinsic value really comes down to what the seller charges.

This is a “buy vs not make” decision – meaning one either buys the IP or it doesn’t bother to make the product. A unique hallmark of IP in this position is that so long as the seller applies pricing consistently, then all buyers know at the very least that they are not disadvantaged relative to the competition and will continue to buy. Sellers will often give some technology away to encourage long-term lock in. For these reasons, pricing of IP in this space tends to be quite stable. That pricing level must subjectively be below the level that customers begin to perform unnatural acts and explore unusual alternatives.  So long as it does, the price charged probably represents accurately the intrinsic value.

Position D on the value chart is a classification of IP that requires adherence to a standard. Like category A, adherence to the standard does not necessarily allow differentiation to the buyer. The buyer of this category of IP might be required to use this IP in order to gain access to the market itself. Though the lack of end-product differentiation available to the buyer might suggest a lower license fee and/or lower to zero royalty rate, we see a significantly less elastic market for this IP type.

This IP category tends to comprise products adhering to closed and/or proprietary standards. IP products built on such closed and/or proprietary standards have given rise to several significant IP business franchises in the marketplace today. The IP in position D is in part characterized by the need to spend significant time and money to develop, market and maintain (defend) their position, in addition to spending on IP development. For this reason, teasing out the intrinsic value of this IP is not as straightforward as “make vs buy.” Pricing is really viewed more as a tax. So the intrinsic value determination is based on a “Fair Tax” basis. If buyers think the tax is no longer “fair,” for any reason, they will make the move to a different technology.

Examples:

Position A:  USB, PCI, memory interfaces (Synopsys)

Position B:  Configurable Processors, Analog IP cores (Synopsys, Cadence)

Position C:  General Purpose Processors, Graphics, DSP, NoC, EPU (ARM, Imagination, CEVA, Sonics)

Position D: CDMA, Noise Reduction, DDR (Qualcomm, Dolby, Rambus)

Why Customer Success is Paramount

Sonics is an IP supplier whose products tend to reside in the Type C category. Sonics sets its semiconductor IP pricing as a function of the value of the SoC design/chip that uses the IP. There is a spectrum of value functions for the Sonics IP depending upon the type of chip, complexity of design, target power/performance, expected volume, and other factors. Defining the upper and lower bounds of the value spectrum depends upon an approximation of these factors for each particular chip design and customer.

Royalties are one component of the price of IP and are a way of risk sharing to allow customers to bring their products to market without having to pay the full value of the incorporated IP up front. The benefit being that the creator and supplier of the IP is essentially investing in the overall success of the user’s product by accepting the deferred royalty payment. Sonics views the royalty component of its IP pricing as “customer success fees.”

With its recently introduced EPU technology, Sonics has adopted an IP business model based upon an annual technology access fee and a per power grain usage fee due at chip tapeout. Under this model, customers have unlimited use of the technology to explore power control for as many designs as they want, but only pay for their actual IP usage in a completed design. The tape out fee is calculated based on the number of power grains used in the design on a sliding scale. The more power grains customers use, the more energy saved, and the lower the cost per grain. Using more power grains drives lower energy consumption by the chip – buyers increase the market value of their chips using Sonics’ EPU technology. The bottom line is that Sonics’ IP business model depends on customers successfully completing their designs using Sonics IP.

Blog Review – Monday, February 27, 2017

Monday, February 27th, 2017

Intel and the IoT at Mobile World Congress; Hardware rally cry; Space race; UVM update; Keepng track of heritage with archaeological tools

It’s Mobile World Congress this week, in Barcelona, Spain (February 27 to March 2). Alison Challman, Intel, rounds up some of the IoT highlights at the show, encompassing automated driving, the smart city and smart and connected homes.

Putting some pep into hardware design, Dave Pursley, Cadence, advocates hardware designers adopt a higher level of abstraction and then synthesizing to RTL implementations via high-level synthesis to get happy.

Lamenting the slow pace of space electronics technology compared with commercial products, Ross Bannatyne, Vorago Technologies, reports on the company’s ARM Cortex-M0 MCU in the SpaceX Falcon 9, which headed for the International Space Station.

Reflecting on the development of UVM1.2, Tom Fitzpatrick, Mentor Graphics, charts the progress of the Universal Verification Methodology (UVM) and how the to tackle compatibility with earlier versions. More can be discussed at this week’s DVCon US at the company’s booth.

Exploring Android, using Qt tools is the topic explored by Laszlo Agocs, Qt, with example of how to develop Android TV Vulkan content. His blog is a guide to building a qtbase for Android, targeting the 64-bit architecture of the Tegra X1-based NVIDIA Shield TV, using QtGui, QtQuick modules.

Digital preservation captures physical, important sites, which may be at risk, or lost completely, through earthquakes, floods, the passage of time and human threats. Alyssa, Dassault Systemes, has found some examples by CyArk that is preserving sites and how virtual reality headsets can make the sites accessible.

Caroline Hayes, Senior Editor

Blog Review – Monday, February 13, 2017

Monday, February 13th, 2017

Among this week’s topics: two important announcements: the OpenFog Consortium and IEEE Standard for the Functional Verification Language e; a panel discusses the Internet and beyond; Mentor Graphics applies IoT to PCB design; FASTR accelerates the connected car and why USB is not as easy as 123

The importance of IP blocks is a given, but Rocke Acree, ON Semiconductor, explains how selection also has to consider technology and support tools. The company has collaborated with Hexius Semiconductor to qualify analog IP blocks to reduce design cycles and development time.

There are specific constraints, challenges and design requirements for PCBs designed for the burgeoning IoT market. John McMillan, Mentor Graphics has created a two-part blog focused on this topic.

Doing a quickstep around the topic of USB, Eric Huang, Synopsys, explores verification and FPGA prototyping for best results. He recommends some design rules, a test site, then curiously, throws in some political comment, a film review and dance-related jokes to end the blog.

It may not be an understatement by Rhonda Dirvin, ARM, to say that the day the OpenFog Consortium announced its reference architecture is the day we have all been waiting for. Hyperbole? Possibly not, as it defines how secure, interoperable products should be built – just what the connected world needs. She helpfully includes a link to the architecture, and a heads-up on a presentation at Mobile World Congress in Barcelona, Spain (Feb 27 to March 3).

If there is an award for Most Apt Acronym, the Future of Automotive Security Technology Research (FASTR) consortium, must be a contender. The uncredited Rambus blog reviews the brief history of the consortium, and discusses its recent manifesto, looking at why it is need for a secure, connected vehicle industry.

2017 begins with the publication of IEEE Std 1647 2016, the IEEE Standard for the Functional Verification Language e. of 2017. Efrat Shneydor, Cadence Design, looks at the enhancements which have been made and proficiently summarizes the highlights.

Generic connectivity is not enough – NASA has been designing, building and launching satellite systems with the goal of providing connectivity throughout the world. The concept and realities of the Internet of Space is the panel discussion topic, reported by John Blyler, Chip Design Magazine.

Caroline Hayes, Senior Editor

Blog Review – Tuesday, January 10, 2017

Tuesday, January 10th, 2017

Moving on from 4K and 8K, Simon Forrest, Imagination Technologies, reports on 360° video, as seen at this year’s CES in Las Vegas. That, together with High Dynamic Range (HDR) could re-energize the TV broadcasting industry in general and the set-top box in particular.

The IoT is responsible for explosive growth in smart homes with connectivity at their centre. Dan Artusi, Intel, considers what technologies and disciplines are coming together as it introduces Intel Home Wireless Infrastructure at CES 2017.

Announcing a partnership with Renault and OSVehicle, ARM will work with the companies to develop an open source platform for cars, cities and transportation. Soshun Arai, ARM, explains how the ‘stripped down’ Twizy can release the brakes on CAN development.

Some Christmas reading has brought enlightenment to Gabe Moretti, Chip Design, as he unravels the mysteries of CEO comings and goings, and why the EDA industry could learn a thing or two from the boards of spy plane and stealth bomber manufacturers.

Still with EDA, Brian Derrick, Mentor Graphics, likens the automotive industry to sports teams, where big names dominate and capture consumers’ interest, eclipsing all others. This is changing as electric vehicles become a super power to turbo charge the industry.

It’s always good to welcome new blogs, and Sonics delivers with its announcement that it is addressing power management. Grant Pierce, Sonics, introduces the technology and product portfolio to enhance design methods.

Caroline Hayes, Senior Editor

Blog Review – Monday, December 19, 2016

Monday, December 19th, 2016

Today’s the day -Bluetooth 5 and ARM is ready; A vision for disruptive technologies; When being better connected counts; Memory – the jewel in the crown; Functional Safety, in three video parts

At the launch of Bluetooth 5, Paul Williamson, ARM, celebrates the contribution of the ARM Cordio IP, qualified to Bluetooth 5 standards, available on the day that qualifications are available.

Gearing up for some disruption in the automotive market, Jeff Bier, Berkley Design, anticipates the role of computer vision and how it is central to autonomous vehicles. His view has shifted from an enhancement for the automotive industry to a transforming force.

Functional safety is adroitly explained by Charles Qi, highlighted by Corrie Callenbach, Cadence Design System. This is the second of a three-parter Whiteboard Wednesdays video series – all well worth a viewing.

Jeff Klaus, Intel, is wondering where has Pokémon Go, gone. His blog looks at the demands on data centers for the future and the world of connectivity of IoT, wearables, navigation devices and their impact on enterprise servers.

https://www.mentor.com/products/fv/blog/post/-that-s-unusual-memory-consistency-acc55210-aa68-41ea-95a3-9f598548e7ec

An audacious jewelery heist by elderly thieves inspires Russell Klein, Mentor Graphics Design, to ponder how Big Data and memory was their downfall, and how CodeLink brings memory consistency.

The connected world is occupying Joe Bryne, NXP and the danger posed by malicious software running on internet connected devices, with a touch of ‘I told you so’, and advocating prevention is better than cure.

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