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Blog Review – Monday, October 23, 2017

Monday, October 23rd, 2017

This week blogs are focused on health and AI, from remote care for the elderly to asthma inhalers using machine learning; plus sewer cleaning and multimedia SoCs

The autonomous car can reduce hospital visits by visiting patients – but won’t that put more cars on the road? David P Ryan, Intel advocates a delivery service for the next generation of healthcare.

Taking an engineer’s view on every object, Peter Ferguson, Arm, looks at the asthma inhaler and takes a deep breath at the Amiko ‘smart’ inhaler which uses an Arm Cortex-M processor.

Former Cadence employee, Vishal Kapoor, presented Preparing for the Cognitive Era, at San Jose State University. Paul McLellan, Cadence reports on why Kapoor is worried about the amount of data companies are collecting.

The importance of video content, used in augmented reality devices and 4K UHD TV, relies on efficient multimedia SoCs. Richard Pugh, Mentor, looks at some of the ways and means to verify the data and cites an interesting example of a customer developing a drone.

No wonder it’s called Solo – who would want to join RedZone Robotics’ autonomous sewer-inspection robot (called Solo)? Steve Leibson, Xilinx, uncovers the clean workings of the robot that crawls and records where others refuse to go, and explains how it uses Spartan FPGA for image processing and for AI. (There’s a video too – but it’s not a mucky one!)

Enough about the IoT, says Jim Harrison, Lincoln Technology Communications, guest blogging for Maxim Integrated. What about how to connect millions of sensors and actuators? He lays out a comprehensive ‘shopping list’ of long range wireless comms and connection options to help speed up the IoT conversation.

Coming full circle, Marc Horner, ANSYS, relates the case study of computational modeling for insulin delivery systems.

Caroline Hayes, Senior Editor

Blog Review – Tuesday, August 29, 2017

Monday, August 28th, 2017

This week, we find Trust issues for autonomous cars; Something old to wear; How to get design teams to talk; Discover Cadence adds ARM to its library; and Unravelling RTOS with Mentor

Autonomous driving – it’s all a matter of trust, says Jack Weast, Intel. Fearing the robot at the wheel can be overcome, he maintains, reviewing the findings of a Trust Interaction Study. His blog covers human-machine judgement, personal space and lack of assistance, awareness and information balance and giving up control.

Proving there is nothing new under the sun, Maeva Mandard, Dassault Systèmes, considers wearable technology and the earliest example of a wearable calculator. She outlines how an integrated view, mechanics, electronics and embedded software will allow design and test teams to work together.

Adopting a novel approach –i.e. different teams communicating – Lucid Motors designed a luxury electric vehicle by locking different engineering teams in a room. Another significant factor, relates Sandeep Sovani, ANSYS, is the use of multiphysics simulation on the Workbench platform for simultaneous optimisation.

Keeping up with multi-core, SoCs, Steve Brown, Cadence explains how the company’s library of portable stimulus is designed for specific functional sub-systems that are common in complex SoCs. The first, for multi-core ARMv8 and ARMv8.2 architectures, are introduced, with a link to Nick Heaton, ARM’s blog on the library. More libraries are promised for later this year.

Some economic policy advice becomes an analogy for Tom De Schutter, Synopsys, for engineers moving from single FPGA prototypes to multiple FPGA ones. How to make the leap painlessly is an interesting read addressing a topic that many will recognize.

A very informative piece by Colin Walls, Mentor Graphics, continues his RTOS focus, with a blog about data transfer. He provides some clear graphics to show the task of data transfer and opens a window on this procedure.

Blog Review – Monday, July 24, 2017

Monday, July 24th, 2017

Let’s hear it for High Fidelity Gaming and it’s all about the IoT, with PCB schematic tips from Mentor and security from Maxim; Inside NI’s 5G test lab and hope for Parkinson’s Disease research

Serious gamers are intriguing Freddi Jeffries, ARM. She looks at High Fidelity Mobile Gaming (HFMG) and who’s adopting it and where. Can mobile devices, based on Mali graphics processing units (GPUs) take on the console market?

A personal and heart-felt post by Altium Designer, Altium, looks at medical advances in treating Parkinson’s Disease. An overview of research by assorted technology companies manages to combine various uses for spoons, concludes with a gentle plug for PCB design software.

Stil with PCBs, John McMillan, Mentor Graphics Design presents part four of an IoT PCB design-themed series. The topic is schematic and layout design, from creating the schematic to component placement and constraint management for effective manufacture.

IoT security is keeping Christine Young, Maxim Integrated occupied – she is keeping busy finding out the scale of cybercrime, and the worrying lack of action companies to take steps for security. She flags up a free webinar on how to safeguard connected devices.

Taking a practical approach is applauded by Michael DeLuca, ON Semiconductor. He likes the attitude of the Institute of Space Systems (IRS) at the University of Stuttgart, whose students are preparing to launch its Flying Laptop satellite.

Taking a sneaky peek at the National Instruments’ 5G Innovation Lab, Steve Leibson, Xilinx, celebrates the company’s Virtex-7 and Kintex-7 FGPAs use in Verizon’s 5GTF (Verizon 5G Technology Forum) test equipment. The Forum is developing a 28/39GHz wireless communications platform to replace fiber in fixed-wireless applications.

By Caroline Hayes, Senior Editor

Blog Review – Monday, July 10, 2017

Monday, July 10th, 2017

This week’s bloggers are kept busy with machine learning (Intel and Synopsys) as well as predicting the future for industry 4.0 (Dassault Systèmes), IoT and 5G (ARM and Hyper) and where Marty McFly went wrong (ANSYS)

As industries gear up to invest four to five per cent of revenues in digitization, Mark Bese, Dassault Systèmes looks at what Industry 4.0 will mean for work process, investment and why early adopters will gain the most.

Is it a bird? Is it a plane? No, it’s a one-wheel skateboard, designed by Kyle Doerksen and much admired by Susan Coleman, ANSYS. She explains how digital prototyping helped get the Onewheel off the ground - while keeping the ride off it.

A practical approach to autonomous vehicles is taken by Puneet Sinha, Mentor Graphics. He looks under-the-hood and provides a comprehensive list of where designers need to focus their attention.

On a learning curve about machine learning, Sean Safarpour, Syopsys, wonders where EDA can assist and positions the company’s VC Formal as the tool for the job.

Not everything in the olden days was better and simulation is a case in point. Xteam at Cadence has written about a new way to reduce simulation test time, as Xcelium Simulator enables multi-core simulation to break the bottleneck and accelerate test times.

Promising new ways to drive the IoT, edge computing and 5G infrastructure, the open source runV project is reviewed by Mark Hambleton, ARM. The Open Containers Iniatitive (OCI)-compliant secure container runtime technology aims to bring security while maintaining performance and portability.

Having a whale of a time, Ted Willke, Intel, heads off to the deep blue yonder to study humpback whales as part of the Parley SnotBot expedition using the SnotBot drone to collect data from the whales’ err, well, snot (or blow). Apparently, it is rich with data from DNA, hormones, to viruses, bacteria, and toxins. (Probably best not to read this blog post over lunch!)

By Caroline Hayes, Senior Editor

Blog Review – Monday, June 12, 2017

Monday, June 12th, 2017

This week, we find traffic systems for drones and answers to the questions ‘What’s the difference between safe and secure?’ and ‘Can you hear voice control calling?’

An interesting foray into semantics is conducted by Andrew Hopkins, ARM, as he looks at what makes a system secure and what makes a system safe and can the two adjectives be interchanged in terms of SoC design? (With a little plug for ARM at DAC later this month.)

It had to happen, a traffic system designed to restore order to the skies as commercial drones increase in number. Ken Kaplan, Intel, looks at what NASA scientists and technology leaders have come up with to make sense of the skies.

Voice control is ready to bring voice automation to the smart home, says Kjetil Holstad, Nordic Semiconductor. He highlights a fine line of voice-activation’s predecessors and looks to the future with context-awareness.

More word play, this time from Tom De Schutter, Synopsys, who discusses verification and validation and their role in prototyping.

Tackling two big announcements from Mentor Graphics, Mike Santarini, looks at the establishment of the outsourced assembly and test (OSAT) Alliance program, and the company’s Xpedition high-density advanced packaging (HDAP) flow. He educates without patronizing on why the latter in particular is good news for fabless companies and where it fits in the company’s suite of tools. He also manages to flag up technical sessions on the topic at next month’s DAC.

Reporting from IoT DevCon, Christine Young, Maxim Integrated, highlights the theme of security in a connected world. She reviews the presentation “Shifting the IoT Mindset from Security to Trust,” by Bill Diotte, CEO of Mocana, and In “Zero-Touch Device Onboarding for IoT,” by Jennifer Gilburg, director of strategy, Internet of Things Identity at Intel. She explores a lot of the pitfalls and perils with problem-solving.

Anticipating a revolution in transportation, Alyssa, Dassault Systemes, previews this week’s Movin’On in Montreal, Canada, with an interview with colleague and keynote speaker, Guillaume Gerondeau, Senior Director Transportation and Mobility Asia. He looks at how smart mobility will impact cities and how 3D virtual tools can make the changes accessible and acceptable.

Caroline Hayes, Senior Editor

Blog Review Monday, May 8, 2017

Monday, May 8th, 2017

This week, there is some N7 news, and the beginning of an HPC renaissance; ARM survives a mountain-top ordeal and Intel has a strategy for IoT; Odd place for sunburn

https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/archive/2017/05/05/tsmc-n7

TSMC’s 7nm process is detailed by Paul McLellan, Cadence, from a visit to CDNLive Silicon Valley. His report is well illustrated and informative.

Predicting a second renaissance in high-performance computing (HPC), Prasad Alavilli, ANSYS, explains the role of CFD and the state-of-play for HPC and what that means for chip design.

Likening Internet security to the American ‘wild west’, Alan Grau, Icon Labs, fears for security measures and corrective actions. He looks at some recent attacks and cures and advocates a strong stance on security.

I suspect Scott Salzwedel, Mentor Graphics, is rather excited about the New Horizons spacecraft, which is due to emerge from its hibernation. His enthusiasm is infectious, and his well-illustrated blog puts the reader as in thrall to the project – and the role of the company’s own Nucleus RTOS – as he clearly is.

The three phases of the IoT revolution are set out by Aaron Tersteeg, Intel. He sets out a clear plan to nuture big ideas and how technology can support the evolution.

PVT (process, voltage and temperature) sensor systems are exciting Rupert Baines, UltraSoC. He considers the company’s co-operation with Moortec Semiconductor, and what this means for SoC monitoring.

Life is not looking too rosy for ARM engineer Matt Du Puy and fellow climbers, at the moment. They are stuck on Mt Kanchenjunga in Nepal, without the drone copter that was confiscated by customs officials. True the team has a toolbox of ARM-powered devices, like the Suunto Ambit smartwatch, satellite beacon, Outernet networking device, Google Pixel smartphone, Go Pro and Ricoh Theta 360-degree camera, reports Brian Fuller, ARM, but there is also sunburn – inside the nostrils (eughhh!).

Caroline Hayes, Senior Editor

Blog Review – Monday, April 24, 2017

Monday, April 24th, 2017

This week’s blogs are concerned with AI and intelligent, connected vehicles, sometimes both. There are quests to find the facts behind myths and searches for answers for power management and software security too.

Is an effective tool for verification, the stuff of legends? Gabe Moretti, Chip Design Magazine, seeks the truth behind Pegasus – no, not the winged horse, the more earthly verification engine from Cadence.

A power strategy is one thing, but a free trial adds a new dimension to energy management. Don Dingee, Sonics, elaborates on the company’s plan to bring power to the masses, using hardware IP and ICE-Grain Power architecture.

If you are unsure about USB, Senad Lomigora, ON Semiconductor’s blog should help. It looks at what it’s for, why we can’t get enough of USB Type C, USB 3.1, connectors and re-drivers.

Every vehicle’s ADAS relies on good visuals, observes Jim Harrison, guest blogger, Maxim Integrated, and good connectivity. He looks at the securely connected autonomous car, and then homes in on explained how Maxim Integrated exploits GMSL, an alternative to Ethernet, in its MAX96707 and MAX96708 chips, to create an effective in-car communication network.

Still with the connected car, Pete Decher, Mentor Graphics, is fresh from the Autotech Council meeting in San Jose. The company’s DRS360 Autonomous Driving Platform launch was high on the list of discussion topics, along with the role of artificial intelligence (AI) in the future of driving.

Still with AI, Evens Pan, ARM provides an in-depth blog on Chinese start-up, Peceptin’s enabled embedded deep learning. The case study is fascinating and well reported in this comprehensive essay.

Making any software engineer feel insecure about software security is an everyday occurrence, helping them out is a little more out-of-the-ordinary, so if it refreshing to see a post from the editorial team, Synopsys, letting the put-upon software engineer know there is a webinar coming soon (May 2) to enlighten them on the Building Security In Maturity Model (BSIMM), with a link to register to attend.

Caroline Hayes, Senior Editor

Blog Review – Monday, April 10, 2017

Monday, April 10th, 2017

This week, there are traps and lures in the IoT, as discussed by ARM and Maxim Integrated; Xilinx believes a video tutorial is a good use of time; Get cosy with SNUG for some insight; and ON Semiconductor is keeping an eye on you

Beware of delivery men bearing IoT gifts, warns, Donnie Garcia, ARM, who also looks at trap doors and NXP’s Kinetis KBOOT bootloader to foil a new attack vector and advertise a related webinar on April 25.

Nagging parents had the right idea, decides Russ Klein, Mentor Graphics, remembering entreaties to turn off lights, and whose energy saving advice he now applies to SoCs and embedded systems, with the help of the Veloce emulator.

Gabe Moretti, Chip Design, gets a bit saucy, trying to figure just what is Portable Stimulus. He gets down to the nitty gritty with how the Accellera System Initiative can help, but still believes some areas need to attended to. Let’s hope the industry pays heed.

More warnings from Kris Ardis, Maxim Integrated, and connected devices. While a Jacquard print may not be to everyone’s taste, the idea of protecting the IoT and its data has universal appeal.

The appeal of Agile design is not lost on Randy Smith, Sonics, who writes about the concept and Agile software development. He deftly dives into advances in Agile hardware design and IC methodology for Agile techniques – keeping every design engineer on their toes.

A visit to ISC West, the security expo, has made Jason Liu, ON Semiconductor, think about surveillance systems, as he throws a spotlight on one of the company’s introductions.

14 minutes does not sound like a long time to pack in all you need to know about Zynq UltraScale+ MPSoCs and Vivado Design Suite, but Steve Leibson, Xilinx points readers towards an interesting, informative video, which he describes as a fast and painless way to see the development tools used in a fully operation system.

It sounds like a self-satisfied neck-warmer, but SNUG (Synopsys User Group) events can be informative. Tom De Schutter attended the one in Silicon Valley and relates what he learned from the technical track with experts from ARM, NVIDIA, Intel and Synopsys about prototyping latch-based designs, ARM CPU and GPU increasing densities and more besides.

Striving to improve the lot of IoT designers, John Blyler, Embedded Systems, talks to Jim Bruister, SOC Solutions, about markets, licensing, open source and five elements that will drive improvement.

Compiled by Caroline Hayes, Senior Editor

Blog Review – Monday, March 27, 2017

Monday, March 27th, 2017

How AI can be used for medical breakthroughs; What’s wired and what’s not; A new compiler from ARM targets functional safety; Industry 4.0 update

A personal history lesson from Paul McLellan, Cadence Design Systems, as he charts the evolution from the beginning of the company, via the author’s career and various milestones with different companies and the trials of DAC over the decades.

Post Embedded World, ARM announced the ARM Compiler 6. Tony Smith, ARM, looks at its role for functional safety and autonomous vehicles.

A review of industrial IoT at Embedded World 2017 is the focus for Andrew Patterson’s blog. Mentor Graphics had several demonstrations for Industry 4.0. He explains the nature of Industry 4.0 and where it is going, the role of OPC-UA (Open Platform Communication – Unified Architecture) and support from Mentor.

What’s wired and what’s wireless, asks David Andeen, Maxim Integrated. His blog looks at vehicle sub-systems and wired communications standards, building automation and wired interface design and a link to an informative tutorial.

There are few philosophical questions posed in the blogs that I review, but this week throws up an interesting one from Philippe Laufer, Dassault Systemes. The quandary is does science drive design, or does design drive science? Topically posted ahead of the Age of Experience event in Milan next month, the answer relies on size and data storage, influenced by both design and science.

Security issues for medical devices are considered by David West, Icon Labs. He looks at the threats and security requirements that engineers must consider.

A worthy competition is announced on the Intel blog – the Artificial Intelligence Kaggle competition to combat cervical cancer. Focused on screening, the competition with MobileODT, using its optical diagnostic devices and software, challenges Kagglers to develop an algorithm that classifies a cervix type, for referrals for treatment. The first prize is $50,000 and there is a $20,000 prize for best Intel tools usage. “We aim to challenge developers, data scientists and students to develop AI algorithms to help solve real-world challenges in industries including medical and health care,” said Doug Fisher, senior vice president and general manager of the Software and Services Group at Intel.

Caroline Hayes, Senior Editor

Behold the Intrinsic Value of IP

Monday, March 13th, 2017

By Grant Pierce, CEO

Sonics, Inc.

Editor’s Note [this article was written in response to questions about IP licensing practices.  A follow-up article will be published in the next 24 hours with the title :” Determining a Fair Royalty Value for IP”].

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Understanding the intrinsic value of Intellectual Property is like beauty, it is in the eye of the beholder.  The beholder of IP Value is ultimately the user/consumer of that IP – the buyers. Buyers tend to value IP based upon their ability to utilize that IP to create competitive advantage, and therefore higher value for their end product. The IP Value figure above was created to capture this concept.

To be clear, this view is NOT about relative bargaining power between buyer and the supplier of IP – the seller –  that is built on the basis of patents. Mounds of court cases and text books exist that explore the question of patent strength. What I am positing is that viewing IP value as a matter of a buyer’s perception is a useful way to think of the intrinsic value of IP.

Position A on the value chart is a classification of IP that allows little differentiation by the buyer, but is addressing a more elastic market opportunity. This would likely be a Standard IP type that would implement an open standard. IP in this category would likely have multiple sources and therefore competitive pricing.  Although compliance with the standard would be valued by the buyer, the price of the IP itself would be likely lower reflecting its commodity nature. Here, the value might be equated to the cost of internally creating equivalent IP. Since few, if any, buyers in this category would see advantage for making this IP themselves and because there are likely many sellers, the intrinsic value of this IP is determined on a “buy vs buy” basis.  Buyers are going to buy this IP regardless, so they’ll look for the seller with the proposition most favorable to the buyer – which often is just about price.

Position B on the value chart is a classification of IP that allows for differentiation by the buyer, but addresses a more elastic market. IP in this category might be less constrained by standards requirements. It is likely that buyers would implement unique instantiations of this IP type and as a result command some end competitive advantage. Buyers in this category could make this IP themselves, but because there are commercial alternatives, the intrinsic value is determined by applying a “make vs buy” analysis. The value proposition of the sellers of this type of IP often include some important, but soft value propositions (e.g., ease of re-use, time-to-market, esoteric features), the make vs buy determination is highly variable and often buyer-specific. This in part explains the variability of pricing for this type of IP.

Position C on the value chart is a classification of IP that serves a less elastic market and empowers buyers to differentiate through their unique implementations of that IP. This classification of IP supports license fees and larger, more consistent, royalty rates. IP in this category becomes the competitive differentiation that sways large market share to the winning products incorporating that IP. This category supports some of the larger IP companies in the marketplace today. Buyers in this category are not going to make the IP themselves because the cost of development of the product and its ecosystem is too prohibitive and risky. The intrinsic value really comes down to what the seller charges.

This is a “buy vs not make” decision – meaning one either buys the IP or it doesn’t bother to make the product. A unique hallmark of IP in this position is that so long as the seller applies pricing consistently, then all buyers know at the very least that they are not disadvantaged relative to the competition and will continue to buy. Sellers will often give some technology away to encourage long-term lock in. For these reasons, pricing of IP in this space tends to be quite stable. That pricing level must subjectively be below the level that customers begin to perform unnatural acts and explore unusual alternatives.  So long as it does, the price charged probably represents accurately the intrinsic value.

Position D on the value chart is a classification of IP that requires adherence to a standard. Like category A, adherence to the standard does not necessarily allow differentiation to the buyer. The buyer of this category of IP might be required to use this IP in order to gain access to the market itself. Though the lack of end-product differentiation available to the buyer might suggest a lower license fee and/or lower to zero royalty rate, we see a significantly less elastic market for this IP type.

This IP category tends to comprise products adhering to closed and/or proprietary standards. IP products built on such closed and/or proprietary standards have given rise to several significant IP business franchises in the marketplace today. The IP in position D is in part characterized by the need to spend significant time and money to develop, market and maintain (defend) their position, in addition to spending on IP development. For this reason, teasing out the intrinsic value of this IP is not as straightforward as “make vs buy.” Pricing is really viewed more as a tax. So the intrinsic value determination is based on a “Fair Tax” basis. If buyers think the tax is no longer “fair,” for any reason, they will make the move to a different technology.

Examples:

Position A:  USB, PCI, memory interfaces (Synopsys)

Position B:  Configurable Processors, Analog IP cores (Synopsys, Cadence)

Position C:  General Purpose Processors, Graphics, DSP, NoC, EPU (ARM, Imagination, CEVA, Sonics)

Position D: CDMA, Noise Reduction, DDR (Qualcomm, Dolby, Rambus)

Why Customer Success is Paramount

Sonics is an IP supplier whose products tend to reside in the Type C category. Sonics sets its semiconductor IP pricing as a function of the value of the SoC design/chip that uses the IP. There is a spectrum of value functions for the Sonics IP depending upon the type of chip, complexity of design, target power/performance, expected volume, and other factors. Defining the upper and lower bounds of the value spectrum depends upon an approximation of these factors for each particular chip design and customer.

Royalties are one component of the price of IP and are a way of risk sharing to allow customers to bring their products to market without having to pay the full value of the incorporated IP up front. The benefit being that the creator and supplier of the IP is essentially investing in the overall success of the user’s product by accepting the deferred royalty payment. Sonics views the royalty component of its IP pricing as “customer success fees.”

With its recently introduced EPU technology, Sonics has adopted an IP business model based upon an annual technology access fee and a per power grain usage fee due at chip tapeout. Under this model, customers have unlimited use of the technology to explore power control for as many designs as they want, but only pay for their actual IP usage in a completed design. The tape out fee is calculated based on the number of power grains used in the design on a sliding scale. The more power grains customers use, the more energy saved, and the lower the cost per grain. Using more power grains drives lower energy consumption by the chip – buyers increase the market value of their chips using Sonics’ EPU technology. The bottom line is that Sonics’ IP business model depends on customers successfully completing their designs using Sonics IP.

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